15 results about "Topological order" patented technology

A system and method include learning a topological order of a plurality of variables in a directed acyclic graph based on real data, computing parameter estimate values corresponding to the real data, computing error values based on the real data, the topological order, and the parameter estimate values, generating simulated data from the parameter estimate values and the error values, such that simulated variables in the simulated data preserve a causal relationship between variables in the real data, and the simulated variables in the simulated data preserve a correlation relationship between the variables in the real data, and reorganizing and outputting the simulated data based on the topological order.

The invention discloses a code abstract generation method and system based on hierarchical context awareness, and belongs to the field of natural language processing and software engineering. The method comprises the following steps: generating hierarchical annotations for a code warehouse based on a function call graph, firstly extracting a call relationship in the graph and eliminating a ring structure, and then classifying leaf nodes and generating annotations; a topological sequence from bottom to top is adopted in the core step, the importance score of a child node is calculated for each father node, child node annotations, class function descriptions and code bodies of the child nodes are fused, and a large language model is input to generate annotations till the whole graph is covered. The method is suitable for an automatic document generation scene of a complex software project, and through a technical path combining function call graph analysis, child node importance measurement and class function description, the accuracy and semantic consistency of code annotation are improved; the method can be widely applied to the fields of software maintenance, code understanding, intelligent development tools, automatic document generation of enterprise-level code warehouses and the like.

The application provides a causal discovery method and device fusing field knowledge of a large language model and a flow model, and relates to the technical fields of artificial intelligence and data mining. The method comprises the following steps: acquiring observation data and variable semantic information of a system to be analyzed; determining a causal topological order between variables by using a large language model; constructing a mask affine autoregressive flow model based on the causal topological order, and training the model by using the observation data; calculating a Jacobian matrix of the flow model with respect to input data, constructing a statistic based on the Jacobian matrix, and performing hypothesis testing; pruning according to a test result to obtain a candidate causal graph; inputting the candidate causal graph into the large language model, and performing secondary verification and pruning on candidate connections by using the variable semantic information to obtain a final sparse causal graph. The application introduces prior knowledge by using semantic information of the large language model, and fits data by using a more flexible function form of the flow model, thereby significantly improving the accuracy and robustness of causal discovery.

The invention belongs to the technical field of artificial intelligence and natural language processing, and particularly relates to a large model multi-hop tool calling training data construction method based on subgraph backtracking, which comprises the following steps: acquiring a large model callable tool to obtain a tool name, a tool description and input and output parameter information; constructing a tool graph which takes tools as nodes and dependencies between input and output of the tools as directed edges; sampling directed acyclic tool sub-graphs with different tool numbers from the constructed tool graph; traversing all dependent edges in the tool sub-graph according to a sub-graph topological sequence, and generating sub-task data corresponding to the dependency relationship by utilizing a first large language model based on tool information connected with each edge; synthesizing all the generated sub-tasks into a complete natural language query by using a second large language model; and verifying the synthesized data and the corresponding tool execution track to generate high-quality multi-hop tool learning data.

The application discloses a kind of vehicle-mounted controller firmware upgrade method, it is related to intelligent network connection automobile technical field, including, the application is accurately described the dependence between versions by introducing directed acyclic graph, provides clear topological order basis for upgrade process, fundamentally eliminates the system function conflict and disorder caused by upgrade sequence confusion;Utilize distributed consensus protocol to ensure that each controller reaches state coordination before upgrading, effectively improves the overall robustness of multi-controller cluster when facing network delay or individual node exception, avoids upgrade failure or version bifurcation caused by part of node not ready;Through group-level binding token and atomic switching mechanism, it is guaranteed that the controller group with strong dependence relationship can be updated as a unified transaction unit, significantly enhancing the security and reliability of cross-domain function linkage.

This application provides an automated code repository generation method, electronic device, and program product, relating to the field of software design and development. The method includes: acquiring functional specification information; generating corresponding functional subtrees based on the functional specification information; clustering nodes in the functional subtrees into multiple functional modules based on the cohesion principle, and generating a modular functional diagram; mapping the functional modules in the modular functional diagram to file structures, generating an enhanced file structure diagram; modeling data flows between functional modules and file sequence dependencies within functional modules based on the enhanced file structure diagram to generate a repository planning diagram; and generating code files using a test-driven development process based on the topological order determined by execution dependencies to form a code repository. This method enhances consistency assurance from high-level functional planning to low-level code implementation, improving the modular quality and maintainability of the code repository generation process.

This invention discloses a fund clearing method based on dynamically constructed directed acyclic graphs (DAGs). The method includes: receiving a transaction request containing transaction context information; selecting a clearing strategy based on this information and instantiating a clearing strategy DAG in memory; traversing and executing the rule templates corresponding to each node according to the topological order of the DAG; collecting atomic accounting instructions generated by all nodes during the traversal; and submitting the instructions to the core accounting system for execution after the traversal is complete. This invention, by deconstructing the clearing logic into a dynamically constructed DAG, achieves separation of business logic and execution engine, improving business flexibility and system performance. It can be used to handle complex transaction scenarios with high concurrency and changing rules, while simplifying auditing and reducing fund processing risks.

The application discloses a campus safety risk identification method and system based on multi-algorithm nested cooperation and a medium, relates to the technical field of campus risk identification, and constructs a dynamic rule library, matches all dynamic rule graphs corresponding to initial event signals from the dynamic rule library, and creates dynamic rule graph instances; each node is activated according to a topological order and an activation condition, the comprehensive confidence and the quasi-truth degree of a potential risk hypothesis are calculated at a convergence node based on DS evidence theory to perform risk early warning; multi-dimensional information is deeply associated and comprehensively judged, and the problems of information silos and low-level misjudgment are solved; a school calendar rhythm is converted into a time weight factor and embedded into a DS evidence fusion process, time background can be perceived, the contribution degree of different types of evidence and the sensitivity of risk decision-making can be automatically adjusted, false positives caused by neglecting context are reduced, and early and accurate early warning can be ensured in a high-risk period.

Non-Abelian anyons are created, braided, and fused using the physical qubits of a QCCD-based quantum processor. A controller controls operation of a confinement apparatus to cause a plurality of physical qubits to be confined by the confinement apparatus. At least some of the plurality of physical qubits are logically organized onto a lattice and have been prepared to provide a non-Abelian topological order ground state. The lattice is formed of a plurality of sublattices. The controller causes performance of an anyon creation gate to cause creation of a first pair of non-Abelian anyons on a sublattice of the plurality of sublattices; causes a path traversal gate sequence to be performed to cause at least a first anyon of the first pair of anyons to traverse a braiding path to form a closed loop on the sublattice; and determines a fusion channel formed by fusing the first pair of anyons.

Non-Abelian anyons are created, braided, and fused using the physical qubits of a QCCD-based quantum processor. A controller controls operation of a confinement apparatus to cause a plurality of physical qubits to be confined by the confinement apparatus. At least some of the plurality of physical qubits are logically organized onto a lattice and have been prepared to provide a non-Abelian topological order ground state. The lattice is formed of a plurality of sublattices. The controller causes performance of an anyon creation gate to cause creation of a first pair of non-Abelian anyons on a sublattice of the plurality of sublattices; causes a path traversal gate sequence to be performed to cause at least a first anyon of the first pair of anyons to traverse a braiding path to form a closed loop on the sublattice; and determines a fusion channel formed by fusing the first pair of anyons.

The invention belongs to the technical field of image recognition, and particularly relates to an intelligent damage detection and evaluation method and system for an accident vehicle, and the method comprises the steps: constructing a normalized distortion energy diagram of a local damage image of the accident vehicle, and initializing a particle swarm to form an annular topological structure; performing iterative search by adopting a particle swarm optimization algorithm, in each iteration, calculating an inertia weight according to the distortion energy value at the current position of the particle, and updating the velocity vector and the position of the particle according to the inertia weight and the distortion energy value at the position of the particle in the topological neighbor set of the particle, and connecting the particles according to a topological sequence when iteration stops to obtain a damage closed polygon contour, further calculating a physical area and a depth index of a damage region, and generating a damage assessment report. According to the invention, automatic repair and evaluation of the damaged edge of the accident vehicle are realized, subjective errors of manual loss assessment are eliminated, and objectivity and accuracy of loss assessment and claim settlement of the vehicle insurance are improved.

A method for detecting topological order in a quantum state of a quantum computer (qc) comprising a plurality of qubits (qb) is specified herein, the method comprising the steps of: - performing at least a partial quantum error correction on the quantum state using a global decoder, wherein a syndrome (syn) configuration of the quantum state is determined by measuring local stabilizer operators, - measuring a 1-form symmetry operator (op) on the at least partially quantum error corrected quantum state, and - detecting topological order in the quantum state by measuring at least one open operator (oo) associated with the 1-form symmetry operator (op) on the at least partially quantum error corrected quantum state. Further, a quantum computer is specified herein.

The invention discloses an SIMD architecture-oriented neural network processor intra-core scheduling method and system, and belongs to the technical field of processor scheduling. Through a three-level screening mechanism of the node type priority, the time window priority and the memory influence degree priority, in combination with dependency constraint processing and L0 cache mutual exclusion constraint management, a scheduling sequence which meets a topological sequence and has the minimum peak cache residence amount is generated, idle computing power in a chip is effectively utilized, and the resource utilization rate is improved. On the basis, cache allocation and swap-in and swap-out operation are optimized based on a cost-aware strategy, an optimized scheduling sequence containing swap-in and swap-out operation nodes is generated, swap-in and swap-out memory minimization is achieved, and the scheduling efficiency and the resource utilization rate are further improved. In addition, the method further optimizes the swap-in and swap-out position, and further reduces the total operation time of the operator on the premise of ensuring that the data carrying amount except the total amount is not obviously increased.

The invention provides a feature analysis method and device, electronic equipment and a storage medium, and belongs to the technical field of artificial intelligence, and the method comprises the steps: obtaining meta-information of each to-be-analyzed feature; the meta-information comprises a feature name, an analyzer and a dependency parameter; combining all the same meta-information of the resolver; establishing a feature dependence tree containing each piece of meta-information; the feature name of the father node in the feature dependency tree corresponds to the dependency parameter of the child node; and based on the topological sequence of the feature dependency tree, calling the parser of each node to obtain the feature corresponding to each node. According to the method, the information of the same feature elements of the resolvers is combined, the more simplified feature dependence tree is established, the resolvers of the nodes are called based on the topological sequence of the feature dependence tree, the total calling frequency of the resolvers is reduced, and therefore time consumed in the feature obtaining stage can be reduced.

The application provides a method and system for bidirectional data type derivation in graphical programming, and relates to the technical field of graphical programming, and comprises the following steps: S1, parsing graphical programming data into a graph structure and a tree structure; S2, performing data type derivation from outside to inside: based on the tree structure, traversing each graph structure in a depth-first order, for a currently traversed graph structure, traversing internal nodes in a topological order of a directed acyclic graph, and according to a data flow direction, deriving a data type of a downstream node according to a data type of an upstream node; S3, performing data type derivation from inside to outside: based on the tree structure, traversing each graph structure in a postorder, for a currently traversed graph structure, determining a data type of an output boundary according to a data type of an internal node, and reversely propagating the data type to a corresponding node in a parent graph; and S4, automatically generating type conversion code according to a predefined data type processing rule.