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584 results about "Logical relationship" patented technology

Logical Relationship: A dependency between two project schedule activities, or between a project schedule activity and a schedule milestone. The four possible types of logical relationships are: Finish-to-Start, Finish-to-Finish, Start-to-Start, and Start-to-Finish.

Method and system for probabilistically quantifying and visualizing relevance between two or more citationally or contextually related data objects

In one embodiment the present invention provides a novel method for probabilistically quantifying a degree of relevance between two or more citationally or contextually related data objects, such as patent documents, non-patent documents, web pages, personal and corporate contacts information, product information, consumer behavior, technical or scientific information, address information, and the like. In another embodiment the present invention provides a novel method for visualizing and displaying relevance between two or more citationally or contextually related data objects. In another embodiment the present invention provides a novel search input / output interface that utilizes an iterative self-organizing mapping (“SOM”) technique to automatically generate a visual map of relevant patents and / or other related documents desired to be explored, searched or analyzed. In another embodiment the present invention provides a novel search input / output interface that displays and / or communicates search input criteria and corresponding search results in a way that facilitates intuitive understanding and visualization of the logical relationships between two or more related concepts being searched.
Owner:PATENTRATINGS

A medical laboratory clinical biochemical detection automatic checking method and system

The invention provides a medical laboratory clinical biochemical detection automatic checking method and system. The method employs a computer software and hardware system and programs multiple checking rules to form a multiple checking rule execution module to automatically check the detection results of various biochemical immunity detection items. The detection results of the various biochemical immunity detection items cannot be sent to an automatic checking unit for automatic checking until they pass the multiple checking rules; if the detection results of the various biochemical immunity detection items cannot pass the above-mentioned checking rules, the detection results are transferred to a manual checking unit for checking; only after the detection results are checked by the manual checking unit or checked again after automatic treatment of dilution, reexamination, test item adding, unqualified sample return and the like by an assembly line can a detection report be issued; the multiple checking rules mainly include a clinical information judging rule, a sample state judging rule, an indoor quality control judging rule, an instrument state judging rule, a range judging rule, a difference judging rule, and a logical relationship judging rule. The checking rules are reasonable in design and cover the pre-analysis, analysis and post-analysis processes, thereby realizing whole-process quality control on a detection analysis process and guaranteeing the accuracy of detection results.
Owner:温冬梅

Debugging system for gate level IC designs

A register transfer level (RTL) IC design describing a IC as comprising a plurality of logic blocks communicating via signals and using a high level language to describe the logic blocks according to the logical relationships between signals they receive and signals they generate. A computer-aided synthesizer processes an RTL IC design to produce a gate level design for the IC describing its logic blocks as comprising instances of cells communicating via signals. A synthesizer or emulator processes the gate level design to produce a gate level dump file referencing signals of the gate level design and indicating how those signals behave in response to time-varying signals supplied as inputs to the IC. The gate level dump file is converted into an RTL dump file referencing signals of the RTL design and indicating how those signals behave. A debugger processes the RTL dump file to produce displays depicting the RTL design and behavior of signals indicated by the RTL dump file. Thus while the IC is simulated or emulated at the gate level of the design to produce waveform data for a debugger, the gate level-to-RTL dump file conversion process enables a designer debug the more familiar RTL design based on the gate level simulation or emulation results.
Owner:SYNOPSYS INC

Project progress management method based on critical chain

The invention relates to a project progress management method based on a critical chain. The project progress management method based on the critical chain comprises the following steps that (1) an initialization module is started and a basic framework of project management is generated; (2) a plan making module creates webs, makes a network planning chart and establishes a personnel and resource table; (3) a plan implementation module conducts an estimation on a time limit of a project according to the mean square error method, project buffer time and feeding buffer time are worked out, an MRCPSP module is established, and a final progress planning table constrained by a project logical relationship and resources is determined; (4) a plan tracking module monitors the implementation condition of the project and recognizes a project progress risk; (5) a project statistic module conducts statistics on the project workload and the resource use condition. By the adoption of the project progress management method based on the critical chain, dynamic management of the project implementation progress and the continuous improvement on the whole project management process are achieved on the premise that constraint conditions of the implementation time of jobs and the precedence relationship between the jobs are met and the resource constrain conditions are met.
Owner:BEIJING SIMULATION CENT

Internet of Things capability and knowledge mapping and construction method thereof

The invention discloses an Internet of Things capability and knowledge mapping and a construction method thereof. The capability and knowledge mapping comprises a model layer and a data layer, whereinthe model layer is used as a capability ontology, comprises specification concept sets and logical relationships of the specification concept sets, and particularly comprises capability concepts, capability relationships, capability attributes, and definition domains and value domains of the capability attributes; the data layer is used as an entity set of the capability and knowledge mapping andinstantiation of the model layer, and particularly comprises capability entities, capability attribute values, relationships between capability entities, object entities, and relationships between the object entities and the capability entities. According to the Internet of Things capability and knowledge mapping and the construction method thereof, capabilities are separated to serve as core nodes of the mapping, meanwhile, the capabilities are distinguished from other attributes of objects, the capabilities can be searched rapidly and relationships between the objects can be established through the capabilities, and supports can be provided for semantic search, service composition and user recommendation in the field of the Internet of Things.
Owner:INFORMATION SCI RES INST OF CETC
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