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Multi-core processor for realizing adaptive dispatching and multi-core processing method

A technology of kernel processing and processing method, applied in the field of multi-core processing, can solve problems such as poor processing performance of multi-core processors, and achieve the effects of increasing throughput, improving processing efficiency, and balancing the number of processed packets

Active Publication Date: 2007-03-28
NEW H3C TECH CO LTD
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  • Abstract
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Problems solved by technology

[0009] The technical problem to be solved by the present invention is to provide a multi-core processor and a multi-core processing method for realizing adaptive scheduling, so as to overcome the defects of poor processing performance of the multi-core processor in the prior art

Method used

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  • Multi-core processor for realizing adaptive dispatching and multi-core processing method
  • Multi-core processor for realizing adaptive dispatching and multi-core processing method
  • Multi-core processor for realizing adaptive dispatching and multi-core processing method

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Embodiment Construction

[0036] In order to overcome the defects of poor processing performance caused by the inflexible scheduling of multi-core processors in the prior art, the present invention provides a multi-core processor that realizes adaptive scheduling and a multi-core processing method that realizes adaptive scheduling , which are described in detail below.

[0037] The multi-core processor for realizing adaptive scheduling provided by the present invention, as shown in Figure 2, includes a message receiving unit 4 for buffering; more than one core processing unit 3[i], i takes a value of 0,1 ......N, N+1 is the number of core processing units; the message sending unit 5 connected with each core processing unit 3[i]; also includes a core scheduling unit (Processor switch module, referred to as PSM) 1 and message distribution unit 2.

[0038] Wherein, the message receiving unit 4 completes the receiving and buffering of the message, specifically storing the message received from the network...

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Abstract

The invention discloses a multi-kernel processor for implementing self- adaptive scheduling, comprising buffering message receiving unit, above one kernel processing unit and the connected message transmitting unit; and also comprising kernel scheduling unit for counting each use parameter of each kernel processing unit and according to the counted results, processing the kernel processing units in groups; message allocating unit, for feeding the message received by the message receiving unit into a group of kernel processing units according to the current grouping information of kernel scheduling units. And it also discloses a multi-kernel processing method for implementing self-adaptive scheduling. And it gives full play to advantages of the multi-kernel processor; increasing system throughput and balancing numbers of messages processed by kernel processing units and raising processing efficiency of the processor.

Description

technical field [0001] The invention relates to the field of multi-core processing, in particular to a multi-core processor and a processing method for realizing adaptive scheduling. Background technique [0002] With the development of chip technology and network technology, the multi-core processor technology integrated in a chip is becoming more and more mature and gradually applied to the field of industrial and family data processing. For example, Intel (Intel) has released a dual-core processor Core 2 Duo , Raza Microelectronics (RMI) has launched a processor that is integrated on the same chip and has 8 microprocessors without internal interlocked pipeline stages (Microprocessorwithout interlocked piped stages, referred to as MIPS). This kind of multi-core processor undoubtedly has a strong advantage in data processing and calculation; but the extent to which this advantage can be realized depends on the sufficiency of each core being called. Especially when multi-co...

Claims

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Application Information

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IPC IPC(8): H04L12/56G06F9/46H04L29/08H04L12/861
Inventor 王松波
Owner NEW H3C TECH CO LTD
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