Power-saving multibit delta-sigma converter

Abstract

A power-saving multi-bit delta-sigma-converter (1) has an input (2) for analog signal (ZA) and an output for a digital output signal (ZD), a D/A converter (4), a summation device (5) for providing the difference between the input signal and the feedback signal (Z3), a filter (6) for the difference signal (Z1), a clocked quantization device (7) for quantizing the filtered difference signal (Z2) tothe digital output signal (ZD) with bit-width N. The quantization device (7) has less than (2 power N)-1 comparators which compare the filtered signal (Z2) with a reference potential associated with each one of the comparators, and output the result at a decoder.Decoder produce digital output signal coming from comparison result, and update the reference potential according to the comparison result.

Description

technical field [0001] The present invention relates to energy-efficient multi-bit delta-sigma converters, where it may be particularly noted that the number of comparators of the digitizer has been reduced. Background technique [0002] So-called delta-sigma converters are often used as analog-to-digital converters because they offer a high degree of digitization and a high signal-to-noise ratio. [0003] A simple delta-sigma converter, often called a bit, provides a one-bit data stream from an analog input signal. If the amplitude of the analog input signal increases, the logic H level dominates the bit in the output of the delta-sigma converter, and if the amplitude decreases, the logic L level dominates the bit. For a constant input signal, the digital output signal fluctuates between H and L levels. Then, in principle, the analog signal can again be obtained from the bit stream by integration. [0004] Such a one-bit delta-sigma converter basically consists of two da...

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Therefore, multi-bit delta-sigma converters w...

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