Semiconductor device manufacturing method, semiconductor device manufacturing equipment, and computer readable medium

a semiconductor device and manufacturing method technology, applied in the direction of instruments, photomechanical treatment, electrical equipment, etc., can solve the problems of increasing the ratio of defective products, unable to identify the cause of deviation, and the dimensions of the actual formed pattern to deviate from the objective dimensions

Inactive Publication Date: 2011-09-29
RENESAS ELECTRONICS CORP
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This method effectively corrects deviations in resist pattern dimensions caused by lithography and etching steps, allowing for easy identification of deviations and reducing the number of defective products by ensuring precise control over pattern dimensions, thereby improving the consistency and quality of semiconductor devices.

Problems solved by technology

However, various factors cause the dimensions of an actually formed pattern to deviate from its objective dimensions.
Fluctuations in dimensions within the same substrate plane cause individual differences in electric characteristics and other characteristics of the semiconductor device, and can lead to an increased ratio of defective products.
However, as mentioned above, various factors can contribute to the deviation of the dimensions of a pattern formed after etching, and identifying the cause of the deviation is difficult.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device manufacturing method, semiconductor device manufacturing equipment, and computer readable medium
  • Semiconductor device manufacturing method, semiconductor device manufacturing equipment, and computer readable medium
  • Semiconductor device manufacturing method, semiconductor device manufacturing equipment, and computer readable medium

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0029]A first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic structural diagram illustrating a semiconductor device manufacturing equipment according to this embodiment. The semiconductor device manufacturing equipment has a heat treatment unit 30, a control unit 10, which controls the temperature of the heat treatment unit 30, and a dimension measuring unit 20, which measures the dimensions of a pattern.

[0030]A substrate processed by the semiconductor device manufacturing equipment of this embodiment is a semiconductor wafer with a film being processed formed on its principal surface. First, a layer of chemical amplification resist is formed on the film being processed of the semiconductor wafer. The resist is exposed to light in a predetermined pattern. The exposed wafer receives heat treatment for accelerating the chemical reaction of the resist (PEB). A development treatment is then performed on the semiconductor wafer...

second embodiment

[0093]A second embodiment of the present invention will be described next. In this embodiment, after the secondary correction of the preset temperature of the heat treatment unit 30 is performed, whether or not the preset temperature corrected by the secondary correction is appropriate is checked with the use of checking wafers and, in the case where the preset temperature is not appropriate, the preset temperature of the heat treatment unit 30 is set again. The rest of the second embodiment is the same as the first embodiment, and a detailed description thereof will be omitted here.

[0094]FIG. 5 is a flow chart of a semiconductor device manufacturing method according to this embodiment. In FIG. 5, steps up through Step S26 where the preset temperature of the heat treatment unit 30 is corrected secondarily are the same as those of the first embodiment.

[0095]STEPS S30-1 TO S32-1: RESIST COATING TO PEB AT SECONDARILY CORRECTED TEMPERATURE OF FOURTH WAFERS

[0096]After the secondary corre...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A semiconductor device manufacturing equipment includes a plurality of heat treatment plates for performing a post-exposure bake (PEB), a first storage section for storing a first relation, said first relation being an association relation between post-development resist pattern dimensions and a preset temperature during the PEB, a second storage section for storing a second relation, the second relation being an association relation between post-etching pattern dimensions and the preset temperature during the PEB, a primary correction section for obtaining post-development resist pattern dimension data for each of a plurality of first substrates processed separately by the plurality of heat treatment plates, and for primarily correcting the preset temperature for each of the plurality of heat treatment plates based on the first relation; and a secondary correction section for obtaining post-etching pattern dimension data for each of a plurality of second substrates.

Description

[0001]The present application is a Divisional Application of U.S. patent application Ser. No. 12 / 379,166, filed on Feb. 13, 2009, which is based on Japanese patent application No. 2008-42015, filed on Feb. 22, 2008, the entire contents of which is incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a semiconductor device manufacturing method, a semiconductor device manufacturing equipment and a computer readable medium for performing the semiconductor device manufacturing method. 2. Description of the Related Art[0004]Patterns for semiconductor devices are lately becoming finer in size. Chemical amplification resist is used to form a pattern for a semiconductor device. The precision required of resist pattern dimensions is increasing as patterns for semiconductor devices become finer in size. However, various factors cause the dimensions of an actually formed pattern to deviate from its objective dimension...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L21/00
CPCY10T29/41G03F7/70625
InventorMURAKAMI, TAKASHI
OwnerRENESAS ELECTRONICS CORP