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3 results about "Common element" patented technology

SiP power module based on circuit board layout optimization

The invention relates to the technical field of data processing, in particular to a SiP power module based on circuit board layout optimization, which comprises a substrate, a common element, a plurality of modules and power terminals, and is characterized in that the common element, the modules and the power terminals are welded on the substrate; carrying out distribution mode combination according to appearance packaging sizes of components in the module to generate a plurality of layout schemes; according to the wiring and junction temperature conditions of components in modules in the layout scheme, the internal layout cost of the modules and the wiring cost among the modules of the layout scheme are obtained, the total layout cost is obtained in combination with the distribution conditions of the components under different junction temperature levels so as to obtain the fitness of the layout scheme, the layout scheme is iteratively optimized based on a genetic algorithm, and the layout cost of the modules is improved. And an optimal layout scheme is obtained. According to the invention, the single-module performance and multi-module cooperation relationship is effectively balanced, and the effective optimization of the circuit board layout is realized.
Owner:XIAN YINGRAN SEMICON TECH CO LTD

Method and assembly wire mesh for processing semiconductor wafers

The invention relates to a method for processing a wafer (100), comprising the following steps: providing the wafer having a structure for a plurality of chips (120) and having a first surface and a second surface opposite the first surface, providing a wire mesh (300) having a base (320) and one or more support structures (310) arranged on the base, the invention relates to a method for producing a wafer comprising one or more support structures of a wire mesh, separating the wafer into the chips, each chip having a surface to be protected (122b), removing the chips from the wafer, placing at least a portion of the removed chips on the one or more support structures of the wire mesh in such a way that a desired arrangement of the placed chips is achieved, the surface to be protected is directed towards the bottom of the wire mesh and is not in direct contact with the one or more support structures, and subsequently connecting the placed chips to a common element, the placement of the placed chips relative to each other being maintained.
Owner:ROBERT BOSCH GMBH

A game product play generation method and terminal

PendingCN122441105AGame playOperations research
The application discloses a game product play generation method and a terminal, which classifies and collects common elements of sweet points in case materials; determines a first combination strategy from preset sweet point combination strategies according to environment composition data of a target product, each sweet point combination strategy is adapted to at least one virtual scene, and each sweet point combination strategy indicates that the probability of adaptation of a sweet point common element to the sweet point combination strategy is higher than the probability of adaptation to other sweet point combination strategies; and generates a game play adapted to the target product based on the environment composition data of the target product and the first combination strategy. The application ensures the pertinence and efficiency of play adjustment by dynamically selecting the most suitable sweet point combination strategy; the method can intelligently adjust according to the environment composition data of the target product, ensure that the generated play can be highly matched with the actual environment of the target game, and further improve the overall experience of the game.
Owner:FUJIAN TQ DIGITAL