65 results about "Maximum magnitude" patented technology

A method and apparatus for compressing signal samples uses block floating point representations where the number of bits per mantissa is determined by the maximum magnitude sample in the group. The compressor defines groups of signal samples having a fixed number of samples per group. The maximum magnitude sample in the group determines an exponent value corresponding to the number of bits for representing the maximum sample value. The exponent values are encoded to form exponent tokens. Exponent differences between consecutive exponent values may be encoded individually or jointly. The samples in the group are mapped to corresponding mantissas, each mantissa having a number of bits based on the exponent value. Removing LSBs depending on the exponent value produces mantissas having fewer bits. Feedback control monitors the compressed bit rate and/or a quality metric. This abstract does not limit the scope of the invention as described in the claims.

Channel state information in a closed-loop, multiple-input, multiple-output wireless networks is fed back from each mobile station to a base station by first determining a transmit covariance matrix R, and applying a singular value decomposition (SVD) R=UΣV^H, where U, V are left and right singular vector matrices, Σ is a diagonal matrix with singular values. The matrix V includes column vectors V. A beamforming vector v_max=[1 exp(jΦ)exp(j2Φ) . . . exp(jΦ)]/√{square root over (N)}] is approximated by the column vector V having a maximum magnitude, where Φ is a real number. Then, only the angle Φ is fed back using a phase modulation mapping of the components exp(jΦ) onto the associated subcarrier.

From the target image data, a luminance component, a first color difference component, and a second color difference component which represent color of respective pixels are acquired; and a maximum magnitude smoothing process is carried out on the first color difference component.

A system and method for improved video encoding and decoding. The present invention addresses issues that arise in the H.264/AVC standard involving “high magnitude coefficients.” According to various embodiments of the present invention, an encoded end of block (EOB) symbol provides information comprising at least one of the maximum magnitude of values in a block, the number of values in the block with a magnitude greater than 1, and a variable length code (VLC) index indicating a VLC to be used in decoding precise magnitudes for non-zero values in the block. By including this information in the EOB symbol, improved coding efficiency is achieved.

A polyphase electrical machine controlled by at least two parallel inverters, each including a number of branches equal to a number of phases of the machine and controlled by PWM. When detecting an inverter branch is faulty, the faulty branch is isolated and the phase in question is powered by each corresponding other inverter branch. The PWM is modified to make power switches of each other branch conductive in succession, without switching while absolute value of the current of the phase in question is greater than or equal to a threshold of 80% to 120% of (n−1)I_max/n, n is number of inverters and I_max is maximum magnitude of the phase current. It is thus possible to continue generating substantially sinusoidal voltages on each of the phases, while avoiding overdimensioning the power switches to ensure in event of a fault they can deliver currents of amplitude higher than in normal operation.

New utility of an existing class of DC galvanically isolated current sourcing circuit topologies for power conversion simultaneously allows improvement in its secondary circuit(s) to power conversion efficiency and reduction in working voltage magnitudes, or simply reduction in working voltage magnitudes, with resulting benefits for reduction in manufacturing cost, reduction in size and weight, and increase in market acceptance, or may simply allow secondary circuit(s) to enable easier provisioning of safety, improvement in reliability, or improvement in efficiency. The magnitude of DC output voltage is optimized at higher value for greater efficiency, while simultaneously optimizing the secondary circuit's working voltage maximum magnitude at a lower value for greater safety. The method requires full cycle current-compliant input impedance of the secondary power source whereby the secondary of the DC galvanically isolating device behaves in a mode of being a full cycle voltage-compliant current source.

A system and method for adjusting loop bandwidth in a synchronization loop of a radio receiver uses a noncoherent peak detector to determine the maximum magnitude and timing of incoming data at various code phase offsets. The maximum magnitude and timing are used in subsequent processing with the maximum magnitude value used to determine an adjustment factor. The timing information associated with the maximum signal value is used to despread the incoming signal. The despread incoming signal is subsequently scaled in accordance with the determined adjustment factor such that the input to the synchronization loop is scaled to produce the desired loop bandwidth.

The present invention provides a high-speed low-voltage programming scheme and self-convergent high-speed low-voltage erasing schemes for Electrically Erasable Programmable Read-Only Memories (EEPROM). For the N-type Field Effect Transistor (NFET) based NVM programming, an elevated source voltage to the substrate can achieve high efficient Drain-Avalanche-Hot-Electron Injection (DAHEI) into the floating gate resulting in high-speed and low-voltage operations. The self-convergent and low-voltage erasing can be achieved by applying Drain-Avalanche-Hot Hole Injection (DAHHI) with the conditions of restricted maximum drain current and a moderate control gate voltage enough to turn on the NFET. For the p-type FET (PFET) based EEPROM programming, a negative source voltage relative to the substrate can achieve high efficient Drain-Avalanche-Hot-Hole Injection (DAHHI) into the floating gate resulting in high-speed and low voltage operations. The self-convergent and low voltage erasing can be achieved by applying Drain-Avalanche-Hot-Electron Injection (DAHEI) with the conditions of restricted maximum magnitude of drain current and a negative moderate control gate voltage enough to turn on the PFET.

The invention provides a complementary metal oxide semiconductor (CMOS) imaging sensor which at least comprises a semiconductor substrate and a plurality of pixel units located in the semiconductor substrate. Each pixel unit at least comprises a first sensitization device, a second sensitization device, a pixel reading circuit and an isolation structure. Compared with the existing CMOS imaging sensor, the second sensitization devices are added in the traditional CMOS imaging sensor, so that an output response curve of the sensitization devices is nonlinearity, corresponding to the same output voltage swing, maximum magnitudes of the CMOS imaging sensor to sense light are increased, namely a maximum value of lighting levels is increased, and accordingly a dynamic range of the imaging sensor is improved. Simultaneously, a connection mode of the pixel reading circuits of the existing CMOS imaging sensor is kept to guarantee image capture quality of the CMOS imaging sensor.

To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have a constant pulse width and increasing magnitudes until a maximum voltage is reached. At that point, the magnitude of the programming pulses stops increasing and the programming pulses are applied in a manner to provide varying time duration of the programming signal between verification operations. In one embodiment, for example, after the pulses reach the maximum magnitude the pulse widths are increased. In another embodiment, after the pulses reach the maximum magnitude multiple program pulses are applied between verification operations.

A method for detecting rotating stall in a compressor is disclosed herein. The method comprises measuring radial vibration of the rotor relative to the stator and generating a vibration measurement signal, calculating a frequency spectrum of the vibration measurement signal, identifying a plurality of frequency bandwidths of the frequency spectrum, neglecting one first frequency bandwidth of the plurality of frequency bandwidths if the rotation frequency of the rotor falls within the first frequency bandwidth, neglecting at least one second frequency bandwidth of the plurality of frequency bandwidths if the rotation frequency of the rotor falls below the second frequency bandwidth, determining the maximum magnitude of the spectrum in each of the non-neglected frequency bandwidths, and comparing each determined maximum magnitude and a predetermined value. Rotating stall is considered occurring if at least one of the comparisons shows that the corresponding determined maximum magnitude is greater than the predetermined value.

A method of, and apparatus for, determining position, comprises a receiver ( 14 ) receiving a signal from a remote transmitter ( 22 ) whose position has to be determined. The Fourier transform of a power spectrum density of the received signal is determined and a check is made to see if a line-of-sight (LOS) signal is present. If so, a multipath mitigation technique is implemented to identify the LOS signal and once identified the position of the remote transmitter is determined by deriving the propagation time of the LOS signal. Current can be saved by inhibiting the multipath mitigation technique in the absence of detecting a LOS signal. In one embodiment the presence or absence of the LOS signal is determined by dividing the magnitude of the peak at zero frequency by the maximum magnitude of all the other peaks and if the answer is less than unity, LOS is not present.

The invention discloses a design method for interference fit between an engine gear and a shaft. The design method comprises the steps of S1, clearing the basic size, the material parameters, the junction surface roughness, the working temperature and the assembly mode of the gear and the shaft; S2, calculating the minimum magnitude of interference; S3, calculating the maximum magnitude of interference; S4, determining the selection range of the magnitude of interference between the gear and the shaft; S5, analyzing and evaluating whether the calculation result meets the expected design index or not; and S6, determining the magnitude of interference between the final gear and the shaft, and designing the size and the tolerance of the gear and the shaft. According to the design method for the interference fit of the engine gear and the shaft, the optimization design of the interference fit of the gear and the shaft can be simply and efficiently completed, and the design period is shortened, the design cost is saved, so that the design of the engine parts is better achieved.

A variable magnetization machine control system comprising a controller configured to generate a reversely rotating d-axis/q-axis current vector trajectory during a change in a magnetization state of a variable magnetization machine to drive the variable magnetization machine at a predetermined speed while maintaining the driving voltage below a predetermined maximum magnitude.