An A/D converter adopting mixed type dual-layer folding circuit

Abstract

The invention belongs to the integrated circuit technical field, in particular to a mixed type double-layer folding circuit analog-to-digital converter. The invention consists of a single sample-hold circuit, a reference resistance string, premagnification, resistance offset averaging and twice interpolating circuit, a rough analog-to-digital converter, a folding circuit, an resistance eight-time interpolating circuit, a comparator and a code circuit, etc.; wherein, the folding circuit consists of an amplifying circuit and an outputting circuit and makes improvement of high-speed and low-dissipation to the amplifying circuit which comprises double-layer amplifying units which are same with the number being M and leads 3 multiplied by M pairs of differential input voltage to be amplified. In the invention, the consumption of the circuit is reduced greatly and the speed is raised greatly.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to an analog-to-digital converter with a folded interpolation structure. Background technique [0002] As a bottleneck in mixed-signal SoCs, high-speed analog-to-digital converters consume significant die area, power consumption, and design time. At the same time, high-speed medium-resolution analog-to-digital converters are widely used in high-speed data communications, liquid crystal display drivers, digital oscilloscopes, and hard disk drive circuits. Among many kinds of analog-to-digital converter circuit structures, the folded structure has the advantages of high speed, small area and easy compatibility with digital technology. [0003] Compared with the all-parallel analog-to-digital converter, the folding analog-to-digital converter greatly reduces the number of comparators due to the use of folding circuits, and the reduced number is related to the f...

AI Technical Summary

Problems solved by technology

It can be seen from Figure 3 that the higher the folding factor is, the more current sources are required and the more power consumption is consumed, and since the folding circuit generally adopts the cross-coupled output connection mode, a large parasitic gate-to-drain capacitance will be introduced on the output node , thus affecting the high-frequency performance of the folded circuit

Images