14-bit width image compression hardware coder

Abstract

The invention relates to a 14-bit width image compression hardware coder which can be used for reducing the storage space and transmission bandwidth required for recording and transmitting high bit width image with 8-14 bits and is developed based on a small wave image compression algorithm with low complexity. The coder comprises the modules as follows: an overall situation state machine controller, four data path gates, four data caches A, B, C and D, an image buffer, a first-stage small wave driver, a second-stage small wave driver, a third-stage small wave driver, a two-dimensional predicator, a two-dimensional small wave variable engine, a data transfer device, an optimization quantizer, a self-adaptive zero-course coder and an index Columbus coder. All the modules are organically combined for parallel processing, thereby realizing high-speed and high-bit width image compression with higher image quality. The real-time compression of a high-bit width camera image can remarkably reduce the image data amount, the storage volume and the requirements for transmission bandwidth.

Description

technical field [0001] The invention relates to a 14-bit high-bit-width image compression hardware encoder, which is a 14-bit high-bit-width image compression hardware encoder based on wavelet transform image compression technology and oriented to VLSI hardware, and is used to realize 8-14-bit high-bit-width video image sequences Continuous compression in real time. Background technique [0002] Image information has the characteristics of large amount of information and large amount of data. According to analysis, among the information received by human beings, 20% are received through sound, while the information received through eyes exceeds 80%. Since ancient times, there has been a saying that "seeing is worth hearing a hundred times", which vividly illustrates the importance and urgency of image information exchange. However, as the size of digital image data increases, the amount of data increases at a geometric rate. If the contradiction between the huge amount of...

AI Technical Summary

Problems solved by technology

Since the current image compression algorithms generally have high computational complexity, it is difficult to achieve real-time image compression coding by using commonly used general-purpose processors or programmable DSPs.

Therefore, hardware such as FPGA or ASIC is used to accelerate image compression to achieve real-time image compression. The highest image bit width supported by dedicated image compression chips on the market is only 12bit / pixel, which can meet the needs of ordinary camera image compression applications.

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