Multi-kernel DSP reconfigurable special integrated circuit system

An integrated circuit, multi-core technology, applied in general-purpose stored program computers, architecture with a single central processor, concurrent instruction execution, etc., can solve problems such as high overhead, and achieve the effect of powerful digital signal processing capabilities and excellent scheduling management capabilities

Inactive Publication Date: 2011-05-25
SHANGHAI JIAO TONG UNIV +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, each processing unit is configured by the control program when a thread is selected, and this SIMD-based processor has a high cost in energy efficiency.

Method used

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  • Multi-kernel DSP reconfigurable special integrated circuit system
  • Multi-kernel DSP reconfigurable special integrated circuit system
  • Multi-kernel DSP reconfigurable special integrated circuit system

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Embodiment Construction

[0018] The embodiments of the present invention are described in detail below. This embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following implementation example.

[0019] Such as figure 1 As shown, this embodiment includes: control processor core 1, enhanced direct memory access 2, input and output cache 3, DSP multi-core array 4, configuration information cache 5, reconfigurable logic unit 6, internal cache 7 and internal bus 8, wherein: the control processor core 1 is connected with other modules through the internal bus 8 and transmits data, address and control information, the enhanced direct memory access 2 is connected with the internal cache 7, the input and output cache 3, and the DSP through the internal bus 8 The multi-core array 4 is connected and transmits the da...

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Abstract

The invention discloses a multi- kernel DSP (digital signal processing) reconfigurable special integrated circuit system, belonging to the technical field of digital signal processing, and comprising: an internal bus, and a control processor kernel, an enhanced direct memory access, an input and output cache, a DSP multi-kernel array, a configuration information cache, a reconfigurable logic unitand an internal cache which are all connected with the internal bus, wherein the DSP multi-kernel array is connected with the configuration information cache and the reconfigurable logic unit througha reconfigurable on-chip interconnection mode and transmits the configuration information and reconfigurable information. The multi-kernel DSP reconfigurable special integrated circuit system can be well combined with an IP multiplexing technology of SoC (System on a Chip), a multi-kernel DSP reconfigurable ASIC (Application Specific Integrated Circuit) takes the DSP multi-kernel array as a core,and simultaneously, integrates IP modules, such as a logic control, an embedded memory, a data interface and the like, thereby being capable of flexibly and efficiently implement large scale computing.

Description

technical field [0001] The invention relates to a device in the technical field of digital signal processing, in particular to a multi-core DSP reconfigurable application-specific integrated circuit system. Background technique [0002] In the field of large-scale computing, the reconfigurable system is a research hotspot of the current architecture, which combines the flexibility of general-purpose processors and the high efficiency of ASIC (special-purpose chip) well, and is oriented to large-scale computing. ideal solution. [0003] Traditional DSP has disadvantages such as low computing speed, non-reconfigurable hardware structure, long development and upgrading cycle, and non-portability. This shortcoming is more obvious when it comes to large-scale computing. ASIC has great advantages in terms of performance, area, and power consumption. However, changing application requirements and rapidly increasing complexity make ASIC design and verification difficult, and the de...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F15/78
Inventor 孔雪余学涛祝永新王绪俞吉波
Owner SHANGHAI JIAO TONG UNIV
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