Low-dropout linear voltage regulator
A low dropout linear, voltage regulator technology, applied in the field of electronics, can solve problems such as long settling time
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Embodiment 1
[0025] Embodiment 1 of the present invention provides a low dropout linear regulator.
[0026] refer to figure 2 , shows a schematic structural diagram of a low dropout linear regulator in Embodiment 1 of the present invention.
[0027] The low dropout linear regulator may include: a first P-type field effect transistor P1, a second P-type field effect transistor P2, a third P-type field effect transistor P3, a first N-type field effect transistor N1, a first resistor R1, the low dropout linear voltage regulator enable signal LDO_EN, the first P-type field effect transistor enable signal ACC_ENB, and the first N-type field effect transistor enable signal ACC_EN.
[0028] Wherein, the LDO_EN enable signal LDO_EN is connected to the enable terminal EN of the flash memory comparator COMP, and the input voltage Vref and the output voltage Vout are respectively connected to the input terminal + and the output terminal − of the flash memory comparator.
[0029] The gate terminal ...
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