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Method for realizing impedance match of lines by adding through holes

A line impedance and via technology, which is used in the formation of electrical connection of printed components, electrical connection of printed components, printed circuit components, etc., to achieve the effect of good promotion and use value, simple realization and novel concept

Inactive Publication Date: 2015-11-04
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the current needs and the shortcomings of the development of the prior art, the present invention provides a method for implementing trace impedance matching by adding via holes

Method used

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  • Method for realizing impedance match of lines by adding through holes
  • Method for realizing impedance match of lines by adding through holes

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Experimental program
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Embodiment

[0017] A method for implementing trace impedance matching by adding vias described in this embodiment, the main steps include: first, when designing a PCB board, calculate the appropriate line width after the trace is thinned in the dense area of ​​the main board , that is, the appropriate line width of the thinned line; second, set an appropriate number of vias on the thinned line.

[0018] In the method described in this embodiment, an appropriate number of via holes is set on the thinning trace, and the setting of the number of via holes at different frequencies is mainly analyzed through simulation, and then added to the final design of the main board.

[0019] Using the method described in this embodiment, for example, on the main board 1, the line width of the normal line 2 is 7.85 mil, and the width of the thinned line 3 in the densely populated area of ​​the board becomes 5 mil; on the line width of the thinned line, Add via hole 4 within 500mil for compensation, as at...

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Abstract

The invention discloses a method for realizing the impedance match of lines by adding through holes, and relates to the field of research, development and design of server mainboards. Lines are thinned down in a dense area of a mainboard, the impedance of the thin lines is increased compared with that of normal lines, the through holes are added to the thinned lines to increase the capacitive load of the thinned lines, the capacitive load decreases the impedance of the thinned lines and thus offset the impedance increase caused by thinning of the lines, and thus, impedance match of the lines on the mainboard is realized. Transmission signals of the mainboard may take the thinned lines as part of uniform transmission lines. The method can be used to effectively solve the problem that the impedance is discontinuous when the signal layout lines on the PCB mainboard are thinned, greatly improve the signal transmission quality of the mainboard, and ensure the completeness and stability of signal transmission.

Description

technical field [0001] The invention relates to the field of R&D and design of server motherboards, in particular to a method for implementing wiring impedance matching by adding via holes. Background technique [0002] With the advent of cloud computing, the development of servers has risen rapidly. In the design of servers, in order to meet the different needs of customers, server application functions are becoming more and more powerful. With the increase of functions, the space design requirements and costs of the motherboard are also constantly increasing. promote. [0003] In motherboard design, especially when there is not enough wiring space, the problem of wiring space is usually solved by increasing the thickness of the board, but increasing the thickness of the board at the same time means increasing the cost of research and development. Therefore, in the case of insufficient space, the direct method that developers will think of is to make the traces thinner, bu...

Claims

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Application Information

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IPC IPC(8): H05K3/40H05K1/11
CPCH05K3/4038H05K1/115H05K2201/095
Inventor 王林李永翠
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD