Method and device for video clock recovery

Abstract

The invention discloses a video clock recovery method and an apparatus thereof. According to video data in link data, a theory frequency of a pixel clock to be recovered is calculated. And a configuration parameter of a loop frequency divider in a phase-locked loop is calculated and the loop frequency divider is configured. According to a read-write state of a double-clock first-in first-out module, a configuration parameter of the loop frequency divider is adjusted so that a clock output by the phase-locked loop corresponding to the adjusted configuration parameter satisfies a requirement that the double-clock first-in first-out module is in a dynamic balance state. During a video clock recovery process, a value of the loop frequency divider is only related to the calculated theory frequency of the pixel clock to be recovered, and a value of a preposition frequency divider can be configured through any modes and does not depend on correlation information sent by a sending terminal, such as a value of Mvid / Nvid. Therefore, after using the video clock recovery scheme provided in the invention, a receiving terminal can be compatible with all the sending terminals so that compatibility of the receiving terminal is increased.

Description

technical field [0001] The present application relates to the technical field of signal transmission, and more specifically, to a video clock recovery method and device. Background technique [0002] In some high-speed signal interface protocols such as DP, MHL V3.1&V3.2 and MIPI protocols, video data is packaged in the link data and transmitted at a certain link rate through the link, and the link does not include the original video Pixel clock, in order to ensure the quality of video signal playback without any data loss or error, it is necessary to regenerate the pixel clock at the receiving end. The process of generating this pixel clock is the video clock recovery process. [0003] Existing video clock recovery schemes all need to rely on information related to video clock recovery sent by the sender, such as Mvid / Nvid in the DP protocol. Depending on the value of Mvid / Nvid, configure the prescaler and loop divider values ​​of the PLL. The accuracy and stability of th...

AI Technical Summary

Problems solved by technology

However, the relevant information sent by different senders in the market has different accuracy and stability, so that the same receiver may not be able or difficult to be compatible with all senders at the same time

Moreover, there is no relevant information about video clock recovery during the transmission process of MHL V3.1&V3.2 and MIPI protocols, which makes the existing video clock recovery schemes incompatible with these protocols

Therefore, video clock recovery schemes that rely on relevant information sent by the sender reduce the compatibility of the receiver

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