Parallel M2K data selection method based on graph theory and hardware space combination distribution

A space combination and data selection technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of high time complexity and space complexity, high resource occupation rate, and high unit power consumption of hardware implementation

Inactive Publication Date: 2018-02-02
SHANGHAI INST OF APPLIED PHYSICS - CHINESE ACAD OF SCI
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Problems solved by technology

[0007] The purpose of the present invention is to provide a parallel M2K data selection method based on the combined distribution of graph theory and hardware space, so as to solve the problems of existing data selection methods, such as high time complexity and space complexity, low execution efficiency, complex implementation, and low resources. Problems of high occupancy rate, poor flexibility, and high unit power consumption of hardware implementation

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  • Parallel M2K data selection method based on graph theory and hardware space combination distribution
  • Parallel M2K data selection method based on graph theory and hardware space combination distribution
  • Parallel M2K data selection method based on graph theory and hardware space combination distribution

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Embodiment Construction

[0071] Embodiments of the present invention will be described below in conjunction with the accompanying drawings.

[0072] Such as figure 1 As shown, the present invention designs a parallel M2K data selection method based on the combined distribution of graph theory and hardware space, including,

[0073] Step S1, data reorganization and distribution. This step specifically includes dividing the M data into L data boxes and sorting the data in each data box from small to large or from large to small. L satisfies formula (2) and thus define Such as figure 2 As shown, dividing M data into L data boxes can be divided into and There are two situations. like is an integer, that is, Then each data box is a complete data box containing k data; if is not an integer, i.e. Then the M data are divided into L-1 complete data boxes containing k data and one incomplete data box containing M-kL+k data. The data sorting in each data box is sorted from small to large whe...

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Abstract

The invention discloses a parallel M2K data selection method based on graph theory and hardware space combination distribution. The method comprises: dividing M pieces of data into L data boxes, and sorting the data therein; comparing the data of every two data boxes in all the current data boxes, extracting k top pieces of the data to store the same into an updated data box, and setting remainingone of the data boxes to an updated data box if the number of the current data boxes is an odd number; and if the number of the updated data boxes is one, determining that the data box is a requestedresult, and otherwise, returning to the previous step. According to the M2K data selection method disclosed by the invention, the M pieces of data are recombined through the L data boxes to reduce adata comparison range and reduce complexity; all data box updating processes can be simultaneously carried out, a parallelism degree and execution efficiency can be greatly improved, and time complexity can be optimized; and the same low hardware space complexity as existing serial methods can be realized, data carrying capacity and flexibility can be improved, and per-unit power consumption of hardware realization can be reduced.

Description

technical field [0001] The invention relates to a parallel M2K data selection method based on the combined distribution of graph theory and hardware space, and belongs to the technical field of digital integrated circuit algorithm optimization. Background technique [0002] With the development of big data and artificial intelligence, the algorithm has been transferred from the general-purpose computing core CPU or GPU to the customized hardware core. More and more multinational companies have accelerated the application of artificial intelligence algorithms through hardware FPGA or ASIC. Algorithms related to data processing cannot avoid the use of data selection and data calculation at the bottom layer. Data selection methods are widely used in intelligent algorithms, coding algorithms, etc., and their application proportion in a large number of data processing algorithms is higher. All of these make the data selection method more important in the application of hardware F...

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Application Information

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IPC IPC(8): G06F17/30
CPCG06F16/221G06F16/9024Y02D10/00
Inventor 阮玮琪李瑞郑丽芳贾文红
Owner SHANGHAI INST OF APPLIED PHYSICS - CHINESE ACAD OF SCI
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