Management method and device of flash memory conversion layer and computer-readable storage medium

A flash memory conversion layer and management method technology, applied in the field of computer-readable storage media, flash memory conversion layer management, can solve the problem of multiple storage of mapping tables, achieve the effect of improving read and write performance and efficiency, and simplifying the process

Inactive Publication Date: 2018-04-27
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention provides a management method, device and computer-readable storage medium of a flash memory conversion layer, to solve the problem that the flash memory conversion layer needs to save the mapping table multiple times when performing a large-capacity erase operation, and realize high-efficiency data erasure

Method used

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  • Management method and device of flash memory conversion layer and computer-readable storage medium
  • Management method and device of flash memory conversion layer and computer-readable storage medium
  • Management method and device of flash memory conversion layer and computer-readable storage medium

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Experimental program
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Embodiment 1

[0043] figure 1 It is a flow chart of a method for managing a flash memory conversion layer in Embodiment 1 of the present invention. This embodiment is applicable to the management of a flash memory conversion layer. The method can be executed by a management device of a flash memory conversion layer, and specifically includes the following steps :

[0044] S110. Determine a target operation to be currently executed according to the preset priority of each operation, and determine a source block and a destination block corresponding to the target operation.

[0045] Wherein, the target operation includes a garbage collection operation, a wear leveling operation, and / or a read recovery operation and the like. The source block is the block stored before data migration, and the destination block is the block to be stored after data migration. That is to say, the source block can be selected from the blocks in which data is currently written, and the target block is selected fr...

Embodiment 2

[0056] This embodiment is a preferred embodiment based on the management of the flash memory conversion layer. On the basis of the above embodiments, when the target operation is a garbage collection operation, correspondingly, the source block and the target block corresponding to the target operation are determined. , including: obtaining the block with written data and the least valid data as the source block, and taking the currently erased block with no data written therein as the destination block.

[0057] Wherein, for the garbage collection operation, the source block may be selected as a block with written data and with the least valid data. The block with the least valid data means that the utilization rate of this block is low to a certain extent, and the space for invalid data causes a waste of flash memory space. The garbage collection operation can reuse the space of invalid data. After the data is migrated and integrated, this part of valid data can be moved to ...

Embodiment 3

[0078] image 3 It is a schematic structural diagram of a management device for a flash conversion layer provided in Embodiment 3 of the present invention, as shown in image 3 As shown, the device includes: an operation determining module 310 and a data moving module 320 .

[0079] Wherein, the operation determination module 310 is configured to determine the target operation to be executed currently according to the preset priority of each operation, and determine the source block and the destination block corresponding to the target operation;

[0080] a data moving module 320, configured to move data corresponding to the target operation from the source block to the target block;

[0081] Wherein, the target operation includes garbage collection operation, wear leveling operation and / or read recovery operation.

[0082]The technical solution of this embodiment provides a management device for the flash memory conversion layer, including: an operation determination module...

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Abstract

The invention discloses a management method and device of a flash memory conversion layer and a computer-readable storage medium. The method includes the steps of according to a preset priority of alloperations, determining a target operation to be executed at present, and determining a source block and a target block which correspond to the target operation; moving data corresponding to the target operation to the target block from the source block, wherein the target operation includes a trach recycling operation, a loss balancing operation and/or a reading and recycling operation. According to the technical scheme, by providing a uniform interface and simplifying procedures, the operations of the flash memory conversion layer are modularized, after the data is moved, a mapping table can be updated, and the read-write performance and efficiency of the flash memory conversion layer are improved.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of memory, and in particular, to a management method, device and computer-readable storage medium of a flash memory conversion layer. Background technique [0002] Nand flash is mainly composed of many block units, and each block includes several pages. A block is the smallest unit of erasing, and a page is the smallest unit of reading and writing. Generally, Nand flash must perform an erase operation before a write operation, and the total number of erase operations of Nand flash is limited. For example, MLC (Triple Level Cell, 2nd-order unit) particles can be erased about 3000 times, and TLC (Triple Level Cell, 3rd-order unit) can be erased about 500 times. To maximize flash memory lifespan, each block must be erased evenly. Moreover, after multiple read operations on the block unit, error bits will also increase. If no processing is performed, ECC will eventually fail to corre...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
CPCG06F3/0616G06F3/064G06F3/0647G06F3/0652G06F3/0679
Inventor 刘凯
Owner GIGADEVICE SEMICON (BEIJING) INC
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