129 results about "Data erasure" patented technology

The embodiment of the invention relates to the technical field of software development, in particular to a vehicle software upgrading method and device, equipment and a storage medium, and aims at reducing computing resource consumption and network resource consumption in the differential upgrading process. The method comprises the steps that differential data and differential configuration information corresponding to the vehicle software are received, the differential data comprise a plurality of differential data blocks, and the differential data blocks are obtained according to different data in a source data packet and an upgrade packet of the vehicle software; the differential configuration information at least comprises a storage address corresponding to each differential data block in the differential data; according to the storage address of the data block corresponding to the differential data, performing data erasing on the data block corresponding to the vehicle software; and writing the differential data into a data block corresponding to the vehicle software.

The invention relates to a non-volatile memory erase scheme. Methods, systems, and devices provide techniques for erasing data in a memory device. The memory device includes a plurality of memory blocks. Each of the plurality of memory blocks includes a plurality of word line segments. Each of the plurality of word line segments includes one or more word lines forming a subset of word lines in the memory block. The memory device further includes a memory controller configured to perform: receiving an erase command for erasing data in the memory block; and in response to receiving the erase command, causing one or more erase pulses to be applied to the plurality of word line segments to ramp up word lines of different word line segments of the memory block in different periods such that when data erase begins at a first word line segment, data erase does not start at another word line segment.

The invention provides a data erasing method and a memory storage device, which can reduce the response time of a data erasing instruction so as to improve the performance of a host system. The memory storage device comprises a memory module and a memory control circuit unit. The data erasing method comprises the steps that in response to a data erasing instruction, multiple target mapping tables are determined according to a target logic address of the data erasing instruction, and the multiple target mapping tables comprise a first mapping table and a second mapping table; executing a data erasing operation on the first mapping table to erase mapping information corresponding to the target logic address in the first mapping table; performing data pre-erasing operation on the second mapping table to mark the second mapping table in the target index table; and sending a reply to indicate that the data erasing instruction is completed.

The invention relates to the technical field of data storage security, in particular to an access protection method for a solid state disk, which comprises a dynamic authentication module and a hierarchical encryption module, the dynamic authentication module generates a temporary access token through multi-dimensional identity authentication, and a behavior analysis component dynamically adjusts the strict degree of a security policy according to the operation habit of a user; the hierarchical encryption module adopts a partition storage structure, performs hierarchical encryption according to data sensitivity and allocates access authority, and a built-in data erasure trigger can quickly clear sensitive data under abnormal access. According to the access protection method for the solid state disk, the reliability and flexibility of data protection of the solid state disk can be improved, the problems that a traditional method is insufficient in safety and complex in operation are solved, meanwhile, user experience and the service life of equipment are considered, and remarkable technical advantages and application value are achieved.

The embodiment of the invention provides a BMS program remote upgrading method and device, and the method comprises the steps that after a system is powered on, a Bootloader firstly runs and waits for an upgrading instruction of an upper computer, if an App program is upgraded, the Bootloader writes an upgrading package into an App backup area, and verification is carried out after writing is completed. After confirming that the data are correct, erasing the data in the App area, and copying the data in the App backup area to the App area; if the program is the upgrade Boot program, the Bootloader writes the upgrade package into the Boot backup area, and verification is carried out after writing is completed. After the data is confirmed to be correct, skipping to an App program, erasing the data in the Bootloader area, and copying the data in the Bootloader backup area to the Bootloader area; after upgrading is completed, the Bootloader restarts the system, and it is ensured that the upgraded program can run normally.

According to one embodiment, a memory system includes a non-volatile memory with a plurality of blocks. The minimum unit of a data erasing operation in the memory system is a block. A controller is electrically connected to the non-volatile memory and configured to execute, in response to a first command from a host requesting a secure erase of secure erase target data stored in a first logical area identified by a first logical area identifier, a copy operation copying valid data other than any secure erase target data from one or more first blocks of the plurality in which the secure erase target data is stored to one or more copy destination blocks of the plurality. The controller executes the data erasing operation on the one or more first blocks after the copy operation.

Systems, methods, and apparatus for memory management operations in a memory device. In one approach, each of multiple banks in a memory array includes a scrub holding register. Data is scrubbed in the background by moving data from a location in a memory array to the scrub holding register. Data in the scrub holding register is scrubbed by error correction circuitry shared by the multiple banks. Status data is recorded for any writes that occur to the array location during the scrubbing. After scrubbing is complete, some or all portions of the scrubbed data are moved back to the array location. The status data is used to identify those portions to move back.

According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.

The invention provides an FPGA remote updating method and a related device, and belongs to the technical field of FPGA remote updating. After a first FPGA board card receives a remote updating command, the state of a jump control area synchronization head is obtained from a jump control area, and which application bit stream area is updated is determined based on the state of the jump control area synchronization head; the first FPGA board card erases data in the first application bit stream area or the second application bit stream area; after the data of the first application bit stream area or the second application bit stream area is erased, the second FPGA board card transmits the update data to the first FPGA board card; the first FPGA board card reads back the updated data from the Flash memory, and performs CRC (Cyclic Redundancy Check) on the read-back updated data to obtain a CRC result; and based on a CRC result, determining whether remote updating of the first FPGA board card is completed or not. The method solves the problems that after FPGA logic codes are modified, programming needs to be conducted block by block, a large amount of time and manpower are occupied, and the project progress is seriously affected.

The utility model relates to the technical field of data protection, in particular to a wireless measurement data protection device, which comprises a bottom plate and a data protection shell, a data protection connecting plug is fixedly connected to the rear end of the data protection shell, and a plurality of heat dissipation grooves penetrating through the inside and the outside are formed in the upper end of the data protection shell. Dust screens are embedded in the inner wall faces of the multiple heat dissipation grooves, and a remote monitoring module, an automatic locking module and a data erasing module are arranged in the data protection shell. According to the wireless measurement data protection device of the utility model, data transfer and replacement are facilitated through the arranged data protection connecting plug and the pluggable storage module, remote management through a mobile phone APP or a webpage is supported through the arranged remote monitoring module, and through the design of the automatic locking module and the data erasing module, the wireless measurement data protection device is convenient to use. Therefore, the method has the functions of anomaly detection and self-protection, effectively protects the safety of the radio measurement data, and prevents the data from being illegally stolen or tampered.

The present invention provides a rewritable memory, comprising a substrate, a barrier layer, a first heterojunction, a second heterojunction, a tunneling layer, a channel layer, a source electrode and a drain electrode, wherein the barrier layer is arranged on the top surface of the substrate; the first heterojunction and the second heterojunction have a unidirectional charge conduction characteristic, and the first heterojunction and the second heterojunction are respectively used for data writing operation and data erasing operation of the rewritable memory; the tunneling layer comprises a horizontal portion and a vertical portion, and the vertical portion is used to separate the first heterojunction and the second heterojunction to avoid lateral charge conduction of the first heterojunction and the second heterojunction; the channel layer is used for charge migration. Two heterojunctions are used as data writing and data erasing channels of the rewritable memory, respectively, so that data writing and data erasing of the rewritable memory are more stable and symmetrical, data erasing and data writing speeds are improved, and dynamic power consumption is reduced. The present invention also provides a method for manufacturing the rewritable memory.

One or more non-transitory computer-readable media having instructions stored thereon, the instructions executable to cause one or more processing units to: in response to a data deletion command issued by a tenant of a cloud service provider, issue a plurality of write commands to storage locations utilized by the tenant, the write commands to write a value to the storage locations based on an input provided by the tenant; and provide data read from at least a subset of the storage locations for attesting, by the tenant, the execution of the data deletion command.

To provide a system for preventing a commodity of which data has not been erased, from being sold.SOLUTION: A system equipped with at least one computer device includes commodity selling means which executes sale start processing to start selling a commodity based on erasure information on erasure of data stored in the commodity, or settlement processing for the commodity. The system equipped with at least one computer device includes availability output means which outputs, based on erasure information on erasure of data stored in a commodity, availability information as to whether the commodity can be sold or not, and / or the erasure information of the commodity.SELECTED DRAWING: Figure 7

[Problem] To both recover a greater amount of valuable material from a used product obtained by mixing a reused item and a recycled item, suppressing the amount of waste to the extent possible, and create an environment that eliminates concerns regarding data leakage and allows a provider, who provides worn-out electronic devices, to provide a used item to a collector without anxiety. [Solution] A used product recovery device 1 comprises: an authentication unit 23 that authenticates a user 102; a data erasure unit 7 that erases data stored in a used product 103; a sorting unit (reused item accommodation unit 81 and recycled item accommodation unit 82) that classifies used products from which data has been erased into two or more types including reused items and recycled items; and an association information providing unit 21 that provides, to an external device 106 related to confirmation of data erasure with respect to the reused items and the like, association information indicating an association between the user 102 authenticated by the authentication unit 23 and the reused item or the like that the user 102 desires to have picked up.

Systems, methods, and apparatus for memory management operations in a memory device. In one approach, each of multiple banks in a memory array includes a scrub holding register. Data is scrubbed in the background by moving data from a location in a memory array to the scrub holding register. Data in the scrub holding register is scrubbed by error correction circuitry shared by the multiple banks. Status data is recorded for any writes that occur to the array location during the scrubbing. After scrubbing is complete, some or all portions of the scrubbed data are moved back to the array location. The status data is used to identify those portions to move back.

The invention provides a memory device and a data erasing method thereof, which can prolong the service life. The data erasing method includes performing a first data erasing action of a memory block, where the memory block includes first to Nth word lines, N being a positive integer greater than 1; for the first word line to the Nth word line of the memory block, sequentially executing an erase verification action one by one; finding out a failed word line of the memory cell which fails to be verified for the first time in the erasing verification action; and enabling the failed word line to the Nth word line to be at least one selected word line, enabling the rest word lines to be at least one unselected word line, shielding the at least one unselected word line, and executing a second data erasing action aiming at the storage unit of the at least one selected word line.

The invention provides a data storage method and device, equipment and a storage medium, and the method comprises the steps: determining a storage address of to-be-stored data, determining a first sector to which the to-be-stored data is to be written, setting a preset flag of the first sector to be in an invalid state, and storing the to-be-stored data in the first sector; and judging whether the first sector and a second sector in which the storage data of the last time period is written are the same sector or not, if the first sector is a new sector which is not the second sector, erasing the storage data of the first sector, and writing the data to be stored into the erased first sector. According to the data storage method provided by the embodiment of the invention, the preset mark of the first sector can be set to be in the invalid state when the stored data in the first sector is invalid, and the original stored data in the first sector is erased and the to-be-stored data is written into the erased first sector when the storage capacity of the second sector is saturated. The method and the device can avoid too long erasing processing time of the stored data and effectively improve the data storage efficiency.

The invention discloses a nonvolatile memory and a data erasing method. The memory comprises a plurality of memory blocks, each memory block comprises a plurality of hierarchies stacked from bottom to top, each hierarchy comprises a plurality of memory units, and pseudo memory units are arranged between adjacent hierarchies. The method includes: performing an erase operation on a first hierarchy of a plurality of hierarchies; the erase operation is not performed on a second hierarchy of the plurality of hierarchies during the erase operation is performed on the first hierarchy.

The application provides an embedded system one-key destruction method and system based on eMMC storage, and belongs to the technical field of memory data destruction. The embedded system one-key destruction method based on eMMC storage comprises the following steps: S1: a key drive detects that a destruction key is pressed down; S2: whether the time of pressing down the destruction key exceeds a first set value is judged, if not, no operation is performed, and if yes, the next step is performed; S3: an eMMC drive scanning function detects the destruction key, and if it is detected that the destruction key is pressed down, the next step is performed; S4: an erase function of the eMMC drive is executed to erase the data of the eMMC; and S5: data destruction is completed. The application has the beneficial effect that based on the existing structure, an external MCU is not needed, and one-key destruction operation of eMMC storage can be realized through pure software.

To enable notification to a specific user of the completion of data erasure while preventing leakage and tampering of information concerning data stored in an image forming apparatus.SOLUTION: The image forming apparatus includes erasure means for erasing data stored in a storage unit, and output means for outputting, in encrypted form, notification information indicating that the data has been erased when the erasure means erases the data.SELECTED DRAWING: Figure 7

A data erasure system (100) comprising a memory (101) comprising a plurality of banks (101a-n). The data erasure system (100) further comprises a processor (102) configured to write data to and / or read data from one of the plurality of banks (101a-n) at a time. The data erasure system (100) further comprises an erasure module (106) configured to perform an erasure operation by overwriting data on two or more of the plurality of banks (101a-n) concurrently, wherein overwriting data on one of the two or 10 more banks (101a-n) is independent of overwriting data on another of the two or more banks (101a-n).

The application discloses a data erasing method and an electronic device, relates to the technical field of data processing, and comprises the following steps: a processor only allows to start a write protection closing and a data erasing process when a management board is a secondary return board type, so that the miserasing operation of a non-target scene such as first production and operation and maintenance is avoided from a scene source. In addition, the closing of the write protection function is directly linked depending on a hardware pin, so that the risk of mistriggering or vulnerability at the software level is reduced. Therefore, the data erasing method provided by the application improves the security of data erasing processing on data in a target address range.

This invention discloses a method, apparatus, device, and medium for handling erasure coding data read failures, relating to the field of distributed storage systems. The method includes: if a target number of available data blocks exist, and any object storage device among the target number of object storage devices reports an error causing data read failure, then the primary object storage device sends an error message to the client, marks the status of the erroneous object storage device, and synchronizes the status marking information to the target object list so that the client can determine whether to perform data erasure coding; if the erroneous object storage device recovers or a new object storage device is added, then the target number of available data blocks are read to obtain the original data, the target data for which the read failed is determined based on the original data, and the target data is written to the target object storage device; the status of the target object storage device is modified by the primary object storage device so that the client can re-initiate the data read request. This improves the overall stability of the storage system.

A method for erasing data stored from memory of a network device comprises erasing stored data from the memory of the network device and requesting data from the memory of the network device after completion of the data erasure procedure or accessing the memory of the network device after completion of the data erasure procedure. The method further comprises determining the outcome of the data erasure procedure based at least in part on: the results of a comparison between a response received from the network device and an expected response which indicates a successful erasure of the memory of the network device; or a comparison between any contents of the memory of the network device after completion of the data erasure procedure and expected contents of the memory after the data erasure procedure which are indicative of a successful erasure of the memory of the network device.

The application provides a data erasing method, device and equipment of a memory and a medium. The data erasing method comprises the following steps: obtaining a first average wear degree and a second average wear degree; reading corresponding mapping tables according to a logical address to be erased; determining an erasing mode according to a comparison result of the first average wear degree and the second average wear degree; when the first mode is adopted, determining and emptying a mapping relationship of a largest mapping table item in the mapping tables according to the logical address to be erased; when the second mode is adopted, updating a corresponding physical address in a mapping relationship of a mapping table item in the mapping tables into a preset invalid data physical address; and erasing user data and invalid data. The application provides a data erasing method, device and equipment of a memory and a medium to solve the technical problem that the life of a mapping table block and the life of user data blocks are not synchronized.

The invention provides a scan chain protection method and a chip system. The chip system comprises a scan chain, an anomaly detection unit, a safety control unit and a risk assessment unit. The anomaly detection unit obtains state information of the scan chain; the risk assessment unit determines the current risk level of the scan chain according to the state information; and if the current risk level meets the data protection condition, the security control unit shields the scan chain and erases sensitive information in the chip system. Thus, when the risk assessment unit confirms that the current risk level of the scan chain reaches the preset data protection condition, the security control unit immediately shields the scan chain and erases the sensitive information, and the sensitive information exposure window period is shortened, so that slight attack is avoided, namely destructive defense actions are met, and the security of the security control unit is improved. And an attacker is effectively prevented from acquiring residual information by using a bypass attack means before data erasing is not completed.

The application discloses an end-side idle time computing power sharing and secure transaction method and system based on a hardware root of trust, and belongs to the technical field of distributed computing and data security. A hardware-level logically isolated secure execution environment is created in a trusted execution environment through a hardware root of trust built in an end-side device, so that bidirectional isolation of task data and device data is ensured. Each transaction is jointly signed by the hardware roots of trust of both parties, so that an unalterable transaction settlement voucher is formed. The system supports user control functions such as manually accepting or rejecting a request, starting or stopping idle time sharing, and externally requesting computing power. After the execution environment is destroyed, full zero overwrite is performed, and a verifiable data erasure certificate is generated. The application solves the core problem of bidirectional trust in idle time computing power sharing, supports transaction evidence storage and public welfare donation evidence storage in accordance with legal norms, and provides a secure and reliable technical foundation for constructing a global end-side distributed computing power network.

The invention relates to the field of data communication, in particular to power equipment, a firmware upgrading method and device thereof and a program product. The method comprises the following steps: receiving differential upgrading data; performing differential reduction according to the differential upgrading data and the first firmware data before upgrading to obtain reduction data of a non-standard firmware area of the second firmware data, determining an initial address of the non-standard firmware area and setting an upgrading identifier; in the system starting process, data erasing is carried out according to the upgrading identification and the initial address, restored data is written into the non-standard firmware area, and the upgrading identification is cleared after firmware upgrading is completed. In the firmware upgrading process, only a small amount of differential upgrading data needs to be transmitted, the reduction of data transmission error probability is facilitated, the upgrading success rate is improved, only data in the non-standard firmware area needs to be erased for writing, the data erasing time can be effectively shortened, the unavailable duration of equipment is shortened, and normal operation of a system is facilitated.

The invention discloses a data erasing method and device, computer equipment and a storage medium, and relates to the technical field of flash memories, the data erasing method comprises the following steps: because a cache vacancy rate can reflect a load condition, a command vacancy time length can reflect a storage task density, data stored in a preset type of flash memory block is relatively important and needs to be erased in time, and the data damage risk is reduced; under the condition that the command idle duration is greater than the idle duration threshold, the current storage task density is relatively low. Therefore, through comprehensive consideration, when the command idle duration is larger than the idle duration threshold value (determined in real time according to the cache idle rate) and the target flash memory block is not the flash memory block of the preset type, the performance index value of the target flash memory block is obtained in real time, the corresponding setting strategy is selected according to the performance index value, and different erasing modes are set for different flash memory blocks. In this way, the erasing mode of the flash memory block is dynamically adjusted by combining various factors to perform the erasing operation, and the flexibility is high.

The present invention relates to an erasing device and method for a memory. The erasing device of the memory controls a switch and a leakage current readout circuit, wherein one end of the control switch is connected to a memory cell and the other end is connected to a switch selection signal, and the leakage current readout circuit includes a transimpedance amplifier and a voltage amplifier. The method comprises: repeatedly performing an erasing operation on the memory cell according to the current difference between the current threshold voltage and the initial threshold voltage until the current difference is less than the set difference. The present invention obtains the leakage current value after the erasing operation through the leakage current readout circuit, calculates the threshold voltage of the memory cell after the erasing operation, and thereby determines the electron residue on the floating gate, so as to realize an effective data erasing operation, and improves the reading accuracy under a wide range of input voltages by improving the circuit design, so as to further improve the effectiveness of data erasing.