159 results about "Data erasure" patented technology

The embodiment of the invention relates to the technical field of software development, in particular to a vehicle software upgrading method and device, equipment and a storage medium, and aims at reducing computing resource consumption and network resource consumption in the differential upgrading process. The method comprises the steps that differential data and differential configuration information corresponding to the vehicle software are received, the differential data comprise a plurality of differential data blocks, and the differential data blocks are obtained according to different data in a source data packet and an upgrade packet of the vehicle software; the differential configuration information at least comprises a storage address corresponding to each differential data block in the differential data; according to the storage address of the data block corresponding to the differential data, performing data erasing on the data block corresponding to the vehicle software; and writing the differential data into a data block corresponding to the vehicle software.

A memory includes a plurality of planes, a controller, and a source line. The controller is configured to erase data of each memory cell in an erase target block selected in each of the planes, by executing an erase sequence that repeats a plurality of loops, each of the loops including a set of an erase operation that erases the data of each memory cell in the erase target block and an erase verification operation that checks whether the data is erased. For each erase target block, the controller is configured to detect whether there is a current leak from the source line, determine validity of the erase sequence based on a detection result, and stop execution of the erase sequence for the erase target blocks that are determined not to be valid.

The present invention discloses a data storage management method for an embedded NOR FLASH chip, which divides the storage space of the NOR FLASH chip into three parts: an index table area, a flag management table area, and a data storage area; through the data occupation flag in the index table area, the data processing flag in the flag management table area, and the data weight, the data to be erased is searched, and its address is placed in the area to be erased; when the Flash storage space is insufficient, the data in the data storage area is erased in sequence according to the data address of the area to be erased. The data storage management method is run when the system CPU is in an idle state, and the data that has been processed and has the lowest data weight in the Flash storage space is erased in advance, thereby reserving sufficient storage space for system data writing, reducing the system waiting time when batch data is erased, and greatly improving the data writing efficiency of the Flash chip.

The invention relates to a non-volatile memory erase scheme. Methods, systems, and devices provide techniques for erasing data in a memory device. The memory device includes a plurality of memory blocks. Each of the plurality of memory blocks includes a plurality of word line segments. Each of the plurality of word line segments includes one or more word lines forming a subset of word lines in the memory block. The memory device further includes a memory controller configured to perform: receiving an erase command for erasing data in the memory block; and in response to receiving the erase command, causing one or more erase pulses to be applied to the plurality of word line segments to ramp up word lines of different word line segments of the memory block in different periods such that when data erase begins at a first word line segment, data erase does not start at another word line segment.

The invention provides a data erasing method and a memory storage device, which can reduce the response time of a data erasing instruction so as to improve the performance of a host system. The memory storage device comprises a memory module and a memory control circuit unit. The data erasing method comprises the steps that in response to a data erasing instruction, multiple target mapping tables are determined according to a target logic address of the data erasing instruction, and the multiple target mapping tables comprise a first mapping table and a second mapping table; executing a data erasing operation on the first mapping table to erase mapping information corresponding to the target logic address in the first mapping table; performing data pre-erasing operation on the second mapping table to mark the second mapping table in the target index table; and sending a reply to indicate that the data erasing instruction is completed.

The invention relates to the technical field of data storage security, in particular to an access protection method for a solid state disk, which comprises a dynamic authentication module and a hierarchical encryption module, the dynamic authentication module generates a temporary access token through multi-dimensional identity authentication, and a behavior analysis component dynamically adjusts the strict degree of a security policy according to the operation habit of a user; the hierarchical encryption module adopts a partition storage structure, performs hierarchical encryption according to data sensitivity and allocates access authority, and a built-in data erasure trigger can quickly clear sensitive data under abnormal access. According to the access protection method for the solid state disk, the reliability and flexibility of data protection of the solid state disk can be improved, the problems that a traditional method is insufficient in safety and complex in operation are solved, meanwhile, user experience and the service life of equipment are considered, and remarkable technical advantages and application value are achieved.

The embodiment of the invention provides a BMS program remote upgrading method and device, and the method comprises the steps that after a system is powered on, a Bootloader firstly runs and waits for an upgrading instruction of an upper computer, if an App program is upgraded, the Bootloader writes an upgrading package into an App backup area, and verification is carried out after writing is completed. After confirming that the data are correct, erasing the data in the App area, and copying the data in the App backup area to the App area; if the program is the upgrade Boot program, the Bootloader writes the upgrade package into the Boot backup area, and verification is carried out after writing is completed. After the data is confirmed to be correct, skipping to an App program, erasing the data in the Bootloader area, and copying the data in the Bootloader backup area to the Bootloader area; after upgrading is completed, the Bootloader restarts the system, and it is ensured that the upgraded program can run normally.

A three-dimensional non-volatile memory includes memory blocks including layers. A data method for erasure verification of the three-dimensional non-volatile memory includes selecting a first layer from the layers on which an erase operation has been performed. The method also includes applying a first local verification voltage to a word line corresponding to the first layer to verify the erase operation on the first layer. When a full block erasure verification is performed on the memory blocks corresponding to the first layer, a voltage applied to the word line corresponding to the memory blocks is a global verification voltage, and the first local verification voltage is lower than the global verification voltage.

A method for data erasing of a non-volatile memory device is disclosed. The memory includes multiple memory cell strings each including a select gate transistor and multiple memory cells that are connected in series. The method comprises applying a step erase voltage to one memory cell string for an erase operation, the step erase voltage having a step-rising shaped voltage waveform. The method further comprises, during a period when the step erase voltage rises from an intermediate level to a peak level, raising a voltage of the select gate transistor from a starting level to a peak level, and raising a voltage of a predetermined region from a starting level to a peak level, such that a gate-induced drain leakage current is generated in the one memory cell string. The predetermined region is adjacent to the at least one select gate transistor and includes at least one memory cell.

A method for erasing data stored from memory of a network device comprises erasing stored data from the memory of the network device and requesting data from the memory of the network device after completion of the data erasure procedure or accessing the memory of the network device after completion of the data erasure procedure. The method further comprises determining the outcome of the data erasure procedure based at least in part on: the results of a comparison between a response received from the network device and an expected response which indicates a successful erasure of the memory of the network device; or a comparison between any contents of the memory of the network device after completion of the data erasure procedure and expected contents of the memory after the data erasure procedure which are indicative of a successful erasure of the memory of the network device.

According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a first block that includes first and second sub-blocks. The memory controller instructs the non-volatile memory to execute a data erase process in units of sub-blocks on data stored in the non-volatile memory. In response to a first value corresponding to the first sub-block having reached a first threshold value, the memory controller reads first data from the first sub-block, executes an error correction process on the first data read from the first sub-block, and writes the first data on which the error correction process has been executed into the non-volatile memory.

According to one embodiment, a memory system includes a non-volatile memory with a plurality of blocks. The minimum unit of a data erasing operation in the memory system is a block. A controller is electrically connected to the non-volatile memory and configured to execute, in response to a first command from a host requesting a secure erase of secure erase target data stored in a first logical area identified by a first logical area identifier, a copy operation copying valid data other than any secure erase target data from one or more first blocks of the plurality in which the secure erase target data is stored to one or more copy destination blocks of the plurality. The controller executes the data erasing operation on the one or more first blocks after the copy operation.

To provide a storage management system, an image processing device, a storage management method, and a program that can easily improve the reliability of management related to data erasure.SOLUTION: A storage management system 30 includes a write processing unit 32, an acquisition processing unit 171, and an output processing unit 172. When erasing data in a storage device 19 removed from an image processing device 10, the write processing unit 32 stores erasure certificate information including the identifier of the storage device 19 in a specific area of the storage device 19. The acquisition processing unit 171 acquires the identifier of the storage device 19 attached to the image processing device 10. The output processing unit 172 outputs the erasure certificate information stored in the storage device 19 attached to the image processing device 10 together with the identifier acquired by the acquisition processing unit 171.SELECTED DRAWING: Figure 3

Systems, methods, and apparatus for memory management operations in a memory device. In one approach, each of multiple banks in a memory array includes a scrub holding register. Data is scrubbed in the background by moving data from a location in a memory array to the scrub holding register. Data in the scrub holding register is scrubbed by error correction circuitry shared by the multiple banks. Status data is recorded for any writes that occur to the array location during the scrubbing. After scrubbing is complete, some or all portions of the scrubbed data are moved back to the array location. The status data is used to identify those portions to move back.

If a first encryption key is stored in a nonvolatile memory (23), an erase controller (14) compresses data read from a designated position of a storage area to generate first sample data. The erase controller (14) controls a storage device (13) to change the first encryption key stored in the nonvolatile memory (23) into a second encryption key. When the second encryption key is stored in the nonvolatile memory (23), the erase controller (14) compresses the data read from the designated position of the storage area to generate second sample data. If the second sample data is different from the first sample data, the erase controller (14) outputs a verification result indicating that the data stored in the storage device (13) has been successfully erased. Otherwise, the erase controller (14) outputs a verification result indicating that the data stored in the storage device (13) has failed to be erased.

The invention discloses a three-dimensional dynamic memory and a preparation method thereof, and relates to the technical field of dynamic memorizers, the memory structure comprises a substrate layer, and a peripheral electrode layer and a memory array grown on the substrate layer; a plurality of vertical annular grooves are formed in the peripheral electrode layer, two vertical holes are formed in the area of each annular groove, and each annular groove and the two holes in the annular groove extend to the first dielectric layer on the bottommost layer of the peripheral electrode layer; and filling a capacitor dielectric layer in the annular groove, and respectively generating a gate layer and a bit line metal electrode layer in the two holes to form a read gate device and a write gate device, thereby forming the memory unit. According to the invention, two one-way gating devices are used for replacing a single two-way conduction device, when data erasing operation needs to be carried out, only specific voltage needs to be applied to the write gating layer and the read gating layer at the same time, the erasing operation of a string of storage units in the vertical direction can be completed, and the erasing operation of the memory is simplified.

According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.

To provide a semiconductor storage device and a detection method which are capable of reducing the loss of valid memory cells and efficiently using the memory cells.SOLUTION: A nonvolatile memory 2 includes a plurality of planes P0 to P3, a sequencer 27, and a source line CELSRC. The sequencer 27 executes erasing sequence of repeatedly performing a plurality of loops including a set of erasing operation of erasing each data of a memory cell included in one erasing target block selected in each of the planes P0 to P3 and erasing verification operation of confirming whether or not data has been erased. Moreover, the sequencer 27, for each erasing target block, detects the presence or absence of current leakage from the source line CELSRC, determines based on results of the detection whether or not the erasing sequence is valid, and cancels the execution of the erasing sequence for the erasing target block determined not to be valid.SELECTED DRAWING: Figure 2

The invention provides an FPGA remote updating method and a related device, and belongs to the technical field of FPGA remote updating. After a first FPGA board card receives a remote updating command, the state of a jump control area synchronization head is obtained from a jump control area, and which application bit stream area is updated is determined based on the state of the jump control area synchronization head; the first FPGA board card erases data in the first application bit stream area or the second application bit stream area; after the data of the first application bit stream area or the second application bit stream area is erased, the second FPGA board card transmits the update data to the first FPGA board card; the first FPGA board card reads back the updated data from the Flash memory, and performs CRC (Cyclic Redundancy Check) on the read-back updated data to obtain a CRC result; and based on a CRC result, determining whether remote updating of the first FPGA board card is completed or not. The method solves the problems that after FPGA logic codes are modified, programming needs to be conducted block by block, a large amount of time and manpower are occupied, and the project progress is seriously affected.

The utility model relates to the technical field of data protection, in particular to a wireless measurement data protection device, which comprises a bottom plate and a data protection shell, a data protection connecting plug is fixedly connected to the rear end of the data protection shell, and a plurality of heat dissipation grooves penetrating through the inside and the outside are formed in the upper end of the data protection shell. Dust screens are embedded in the inner wall faces of the multiple heat dissipation grooves, and a remote monitoring module, an automatic locking module and a data erasing module are arranged in the data protection shell. According to the wireless measurement data protection device of the utility model, data transfer and replacement are facilitated through the arranged data protection connecting plug and the pluggable storage module, remote management through a mobile phone APP or a webpage is supported through the arranged remote monitoring module, and through the design of the automatic locking module and the data erasing module, the wireless measurement data protection device is convenient to use. Therefore, the method has the functions of anomaly detection and self-protection, effectively protects the safety of the radio measurement data, and prevents the data from being illegally stolen or tampered.

The present invention provides a rewritable memory, comprising a substrate, a barrier layer, a first heterojunction, a second heterojunction, a tunneling layer, a channel layer, a source electrode and a drain electrode, wherein the barrier layer is arranged on the top surface of the substrate; the first heterojunction and the second heterojunction have a unidirectional charge conduction characteristic, and the first heterojunction and the second heterojunction are respectively used for data writing operation and data erasing operation of the rewritable memory; the tunneling layer comprises a horizontal portion and a vertical portion, and the vertical portion is used to separate the first heterojunction and the second heterojunction to avoid lateral charge conduction of the first heterojunction and the second heterojunction; the channel layer is used for charge migration. Two heterojunctions are used as data writing and data erasing channels of the rewritable memory, respectively, so that data writing and data erasing of the rewritable memory are more stable and symmetrical, data erasing and data writing speeds are improved, and dynamic power consumption is reduced. The present invention also provides a method for manufacturing the rewritable memory.

The present application is about a method for reading and writing data in a Flash memory. The method includes: obtaining data to be stored; reading the check bit data of the mth unit, where m is an integer greater than or equal to zero; judging the data storage situation of the mth unit according to the check bit data of the mth unit, if there is no stored data in the mth unit, judging whether the data to be stored is successfully written after writing the data to be stored in the mth unit, if so, adding one to m and clearing the write error count to zero, and then executing the step of obtaining the data to be stored; if not, after adding one to the write error count, judging whether the write error count is greater than or equal to the first write error count threshold, if so, erasing the data on the Flash memory and clearing m and the write error count to zero, ending the data storage program and issuing a service life detection reminder. The solution provided by the present application can improve the read and write speed of the Flash memory and avoid wasting its service life.

The invention discloses a computer anti-loss method protected by firmware, and relates to the technical field of computer security and data protection. The method comprises the following steps of: checking the existence, the integrity and the reliability of an operating system security protection module stored at a specified position of a computer storage medium by a computer firmware guard module, starting the operating system security protection module when the checking is passed, and starting the operating system security protection module after the operating system security protection module is started. According to the method, the computer risk control management system is requested to return the risk control strategy for preventing the loss of the computer, and the returned risk control strategy is executed, so that the execution and protection of the risk control strategy are not limited to an operating system layer, but sink to computer firmware, and the risk control strategy is protected. According to the technical scheme, the risk control strategy can still be executed under the limit condition that the computer hard disk is replaced or the operating system is formatted, and locking or data erasing can be performed after the computer is lost, so that the application scene and the universality can be expanded, and the practical application and popularization are facilitated.

One or more non-transitory computer-readable media having instructions stored thereon, the instructions executable to cause one or more processing units to: in response to a data deletion command issued by a tenant of a cloud service provider, issue a plurality of write commands to storage locations utilized by the tenant, the write commands to write a value to the storage locations based on an input provided by the tenant; and provide data read from at least a subset of the storage locations for attesting, by the tenant, the execution of the data deletion command.

To provide a system for preventing a commodity of which data has not been erased, from being sold.SOLUTION: A system equipped with at least one computer device includes commodity selling means which executes sale start processing to start selling a commodity based on erasure information on erasure of data stored in the commodity, or settlement processing for the commodity. The system equipped with at least one computer device includes availability output means which outputs, based on erasure information on erasure of data stored in a commodity, availability information as to whether the commodity can be sold or not, and / or the erasure information of the commodity.SELECTED DRAWING: Figure 7

[Problem] To both recover a greater amount of valuable material from a used product obtained by mixing a reused item and a recycled item, suppressing the amount of waste to the extent possible, and create an environment that eliminates concerns regarding data leakage and allows a provider, who provides worn-out electronic devices, to provide a used item to a collector without anxiety. [Solution] A used product recovery device 1 comprises: an authentication unit 23 that authenticates a user 102; a data erasure unit 7 that erases data stored in a used product 103; a sorting unit (reused item accommodation unit 81 and recycled item accommodation unit 82) that classifies used products from which data has been erased into two or more types including reused items and recycled items; and an association information providing unit 21 that provides, to an external device 106 related to confirmation of data erasure with respect to the reused items and the like, association information indicating an association between the user 102 authenticated by the authentication unit 23 and the reused item or the like that the user 102 desires to have picked up.

Systems, methods, and apparatus for memory management operations in a memory device. In one approach, each of multiple banks in a memory array includes a scrub holding register. Data is scrubbed in the background by moving data from a location in a memory array to the scrub holding register. Data in the scrub holding register is scrubbed by error correction circuitry shared by the multiple banks. Status data is recorded for any writes that occur to the array location during the scrubbing. After scrubbing is complete, some or all portions of the scrubbed data are moved back to the array location. The status data is used to identify those portions to move back.

The invention provides a memory device and a data erasing method thereof, which can prolong the service life. The data erasing method includes performing a first data erasing action of a memory block, where the memory block includes first to Nth word lines, N being a positive integer greater than 1; for the first word line to the Nth word line of the memory block, sequentially executing an erase verification action one by one; finding out a failed word line of the memory cell which fails to be verified for the first time in the erasing verification action; and enabling the failed word line to the Nth word line to be at least one selected word line, enabling the rest word lines to be at least one unselected word line, shielding the at least one unselected word line, and executing a second data erasing action aiming at the storage unit of the at least one selected word line.

The invention provides a data storage method and device, equipment and a storage medium, and the method comprises the steps: determining a storage address of to-be-stored data, determining a first sector to which the to-be-stored data is to be written, setting a preset flag of the first sector to be in an invalid state, and storing the to-be-stored data in the first sector; and judging whether the first sector and a second sector in which the storage data of the last time period is written are the same sector or not, if the first sector is a new sector which is not the second sector, erasing the storage data of the first sector, and writing the data to be stored into the erased first sector. According to the data storage method provided by the embodiment of the invention, the preset mark of the first sector can be set to be in the invalid state when the stored data in the first sector is invalid, and the original stored data in the first sector is erased and the to-be-stored data is written into the erased first sector when the storage capacity of the second sector is saturated. The method and the device can avoid too long erasing processing time of the stored data and effectively improve the data storage efficiency.

The utility model provides an efficient data erasing device, which belongs to the technical field of data erasing and comprises a data erasing device body, a control panel arranged at the top of the data erasing device body, an upper cover hinged to the top of the data erasing device body, a plurality of hard disk interfaces arranged at the top of the data erasing device body, and a guide frame arranged at the top of each hard disk interface. An air inlet and a first heat dissipation hole are formed in the left side and the right side of the top of the data erasing device body respectively, a second heat dissipation hole is formed in the left side of the data erasing device body, an air cooling device a is arranged at the bottom of the air inlet, and a separation frame is arranged on the bottom wall, close to the right side, of the data erasing device body. By means of the structure, the problems that when a large amount of hard disk data are erased, the hard disk data can only be processed one by one, parallel operation cannot be achieved, the working efficiency is reduced, the data erasing time is prolonged, the risk of data leakage is even increased, and the data erasing efficiency is improved. And the data security cannot be guaranteed.