CPU, electronic equipment and CPU cache control method

A cache, read and write control technology, applied in memory systems, digital data processing, memory architecture access/allocation, etc., can solve the problems of low CPU performance, small cache space, and waste of cache space.

Active Publication Date: 2019-11-01
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In practical applications, when the system needs to be used in various scenarios, if the cache space of the CPU used is small, the cache space will be insufficient during use, which will cause low C

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  • CPU, electronic equipment and CPU cache control method
  • CPU, electronic equipment and CPU cache control method
  • CPU, electronic equipment and CPU cache control method

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Embodiment Construction

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0030] The core of the embodiment of the present invention is to provide a CPU, which can not only improve the hit rate of the CPU cache space, but also avoid the waste of the cache space; another core of the present invention is to provide an electronic device and a CPU cache control method , all have the above-mentioned beneficial effects.

[0031] In order to enable those skilled in the art to better understand the solution of the present invention, the pre...

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Abstract

The invention discloses a CPU which comprises a CPU body and further comprises: a second processor interconnection interface detachably connected with a first processor interconnection interface of the CPU body, a bus protocol module which is connected with the second processor interconnection interface and used for providing a bus protocol, a cache read-write control module which is connected with the bus protocol module and used for controlling read-write operation; and a cache memory which is connected with the cache read-write control module and is used for caching data information. According to the CPU provided by the invention, the cache space can be increased or reduced according to actual requirements, and the cache space of the CPU can be conveniently and flexibly adjusted, so that on one hand, the hit rate of the cache space of the CPU can be improved, the working efficiency of the CPU is further improved, and the system performance is improved; and on the other hand, waste of the cache space can be avoided. The invention also discloses an electronic device and a CPU cache control method, which have the above beneficial effects.

Description

technical field [0001] The invention relates to the field of chip control, in particular to a CPU, an electronic device and a CPU cache control method. Background technique [0002] In recent years, with the rapid development of computer technology, the requirements for CPU performance are getting higher and higher. The performance of the CPU affects the performance of the entire system, and the size of the cache space of the CPU affects the performance of the CPU. During the chip design process, the size of the cache space of the CPU is determined by the size of the cache space set in the cache memory of the CPU. In practical applications, when the system needs to be used in various scenarios, if the cache space of the CPU used is small, the cache space will be insufficient during use, which will cause low CPU performance efficiency; Directly select a CPU with a large cache space, but in practical applications when a large-capacity cache is not needed most of the time, it...

Claims

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Application Information

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IPC IPC(8): G06F12/0862G06F12/0893G06F13/16
CPCG06F12/0862G06F12/0893G06F13/1668G06F2212/1021G06F2212/1044
Inventor 李拓
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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