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Chip, integrated processing device and method of operation

A technology for processing equipment and chips, applied in electrical digital data processing, digital data processing components, architectures with a single central processing unit, etc., can solve problems such as limiting operational flexibility, achieve data independence, and reduce operating power , the effect of increasing the bandwidth

Active Publication Date: 2022-07-12
ICLEAGUE TECH CO LTD +1
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  • Claims
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AI Technical Summary

Problems solved by technology

However, reusing data for multiple computations fixes the operations to obtain these data, which limits the flexibility of operations

Method used

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  • Chip, integrated processing device and method of operation
  • Chip, integrated processing device and method of operation
  • Chip, integrated processing device and method of operation

Examples

Experimental program
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Embodiment Construction

[0031] In different applications of the chip, the bandwidth of the received data (such as the operand of the multiplier), the operating power of the chip or the integrated processing device on the chip (also known as the integrated processing unit, Integrated Process Unit, referred to as "IPU") , and operating parameters such as data independence may not be the same. For example, AI chips can be used for different neural networks at different times, and the computation applied to one type of neural network may not be necessary for another type of neural network, so different types of neural networks may not have the same computational requirements Moreover, different types of neural networks may also have different requirements for the bandwidth of receiving data, the operating power of the chip / integrated processing device, and the independence of data.

[0032] However, in the existing chip architecture, the data received by the integrated processing device is fixed, and the...

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Abstract

Embodiments of the present application provide a chip, an integrated processing device, and an operation method thereof. The integrated processing device includes a computing unit, a first storage unit coupled to the computing unit, and a second storage unit; wherein the computing unit is adapted to selectively operate based on different demand levels of operating parameters of the integrated processing device in different applications of the chip Operands are respectively received from two of the first storage unit, the second storage unit, and an external data source external to the integrated processing device, the external data source storing operands usable by multiple integrated processing devices on the chip. The embodiments of the present application can meet the implementation requirements of relevant operating parameters in the integrated processing device, and can also maximize the use of the computing power of the integrated processing device.

Description

technical field [0001] The present invention relates to the field of chips, and in particular, to a chip, an integrated processing device and an operation method thereof. Background technique [0002] The application of chips is becoming more and more extensive. For example, with the development of neural network technology, artificial intelligence (Artificial Intelligence, referred to as "AI") chips need more powerful computing power, which can be achieved by adding more computing elements to AI chips. To achieve, and more computing elements require a lot of data to calculate. [0003] The amount of data entering the computing unit per unit time is called bandwidth, and the bandwidth will limit the actual performance of the AI ​​chip. For every AI chip architecture, a big challenge is how to ensure enough bandwidth so that data can be provided to computing units in a timely manner. Typically, within an AI architecture, the data paths to the compute unit are fixed; there a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/063G06F7/523G06F15/78
CPCG06N3/063G06F7/523G06F15/7807Y02D10/00
Inventor 谭经纶
Owner ICLEAGUE TECH CO LTD
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