A hybrid branch prediction device and method for out-of-order high-performance cores

A branch prediction, high-performance technology, applied in machine execution devices, program control design, instruments, etc., can solve the problem of low accuracy of processor core performance analysis, and achieve the effect of reducing access conflicts

Active Publication Date: 2021-11-12
核芯互联科技(青岛)有限公司
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Problems solved by technology

[0005] The purpose of the embodiments of the present invention is to provide a hybrid branch prediction device and method for out-of-order high-performance cores, to provide a high-precision hybrid branch predictor, and to solve the problem of low precision in performance analysis of existing processor cores

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  • A hybrid branch prediction device and method for out-of-order high-performance cores
  • A hybrid branch prediction device and method for out-of-order high-performance cores

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Embodiment Construction

[0022] The implementation of the present invention will be illustrated by specific specific examples below, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0023] In the following description, for purposes of illustration rather than limitation, specific details, such as specific system architectures, interfaces, and techniques, are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the invention may be practiced in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0024] When a processor with pipeline technology processes branch instructions, it will encounter a problem. Depending on the true / f...

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Abstract

The invention discloses a hybrid branch prediction device and method of out-of-order high-performance cores, and relates to the field of computer branch prediction. The device can perform performance evaluation at the microarchitecture level of the processor, and alleviate the renaming blockage of out-of-order high-performance processors caused by branch prediction failures and missing instructions; the device provides a high-precision, flexible and configurable hybrid The branch predictor is composed of a global historical information branch TAGE predictor, a statistical correction predictor and a cycle predictor; the TAGE predictor utilizes parameterized Tagged components and split read improvement strategies to achieve high-precision branch prediction and reduce access conflict; the statistical correction predictor is used to confirm or restore the prediction result of the TAGE predictor according to the prediction result and confidence of the TAGE predictor; the cycle predictor is used to use the replacement strategy and the cycle branch reduction technology to predict The principal's rule loop. The invention makes full use of limited hardware storage overhead, greatly reduces access conflicts, and improves the overall performance of the processor while improving branch prediction accuracy.

Description

technical field [0001] Embodiments of the present invention relate to the field of branch prediction, and in particular to a hybrid branch prediction device and method for out-of-order high-performance cores. Background technique [0002] With the continuous improvement of the performance of the processor core, the processor micro-architecture is also increasingly complex. Faced with increasingly complex processor microarchitecture and limited development time, how to effectively evaluate processor performance has become an important problem to be overcome in processor design. The increase in the number of transistors on a single chip allows the processor to adopt a more complex micro-architecture, and technologies such as superscalar, branch prediction, out-of-order execution, and forward-looking execution are also widely used. However, the problem brought about by the increasingly complex micro-architecture is how to conduct more effective performance analysis in the proc...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
CPCG06F9/3848
Inventor 陈伟杰
Owner 核芯互联科技(青岛)有限公司
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