Method and circuit for reducing program skip overhead in CPU

Abstract

The invention provides a method used in an embedded CPU (Central Processing Unit) and used for reducing program skip overhead and circuit implementation thereof. According to the method, historical score values are added into the skip address lookup table entries, score comparison is carried out on the table entries, and therefore the most frequently-occurring skip destination address is reservedin the lookup table entries, and the skip delay overhead is effectively reduced. According to the method, in terms of hardware implementation, a CPU classic cache structure is adopted, and the score value is used as a table item replacement basis.

Description

technical field [0001] The invention belongs to the technical field of embedded processors in integrated circuits, in particular to a method and circuit for reducing program jump overhead in a CPU. Background technique [0002] The core function of the CPU (Central Processing Unit) is to read and execute software program instructions. The first step in reading and executing instructions is to fetch instructions, that is, the process in which the CPU sends the address of the target instruction to the bus or storage device, and the bus or storage device returns the target instruction to the CPU according to the address sent by the CPU. Programs are generally read and executed sequentially until a program jump occurs. That is to say, the address of the target instruction is incremented sequentially when the instruction is fetched until a jump instruction is encountered. [0003] There is a certain delay time from when the CPU sends an address to when the bus or storage device...

AI Technical Summary

Problems solved by technology

This process often takes several cycles in actual use, and cannot achieve the ideal seamless and overhead-free jump effect

Images