Neural network weight storage method, neural network weight reading method and related equipment

A neural network and weight technology, applied in the computer field, can solve the problems of high chip power consumption and cost, optimal chip throughput, and difficult storage space, etc., achieve low DDR transmission bandwidth, and solve cycle problems. Effects of buffer overflow, power consumption and cost reduction

Active Publication Date: 2021-08-06
AZURENGINE TECH ZHUHAI INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the above solutions still have various disadvantages, such as large transmission bandwidth, large storage space or di

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  • Neural network weight storage method, neural network weight reading method and related equipment
  • Neural network weight storage method, neural network weight reading method and related equipment
  • Neural network weight storage method, neural network weight reading method and related equipment

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Embodiment Construction

[0075] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiment of the application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiment of the application. Obviously, the described embodiment is only It is an embodiment of a part of the application, but not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0076] The terms "comprising" and "having" and any variations thereof appearing in the specification, claims and drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further ...

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Abstract

The invention provides a neural network weight storage method, a neural network weight reading method and related equipment, and the storage method comprises the steps: solidifying the weight of a first layer of a neural network in a static memory of a static random access memory when a system is initialized; obtaining a weight cumulative length of each layer of the neural network in a cyclic cache of a static random access memory; solidifying the weight of the target layer in each layer in a static memory according to the weight accumulation length; executing the next operation of acquiring the accumulated length of the weight, and repeatedly executing the operation of acquiring the accumulated length of the weight for multiple times until the target layer does not exist in each layer; and setting the size of the circular cache according to the corresponding weight accumulation length when the target layer does not exist in each layer. According to the embodiment of the invention, the problems of overflow and underflow of the cyclic cache can be solved, so that the chip achieves better throughput, and the power consumption and the cost of the chip are reduced.

Description

technical field [0001] The present application relates to the field of computer technology, in particular to a neural network weight storage method, reading method and related equipment. Background technique [0002] As the computing power of AI (Artificial Intelligence, artificial intelligence) chips is getting stronger and the neural network model is getting deeper and deeper, the AI ​​processor needs to read a large amount of weight data for calculation when performing training or reasoning. In order to reduce the power consumption and cost of the chip, relevant personnel have done in-depth research on the storage of neural network weights. The current mainstream storage solutions include high-speed DDR (Double DataRate, double-rate synchronous dynamic random access memory) combined with Cache cache, or using super large capacity of SRAM (Static Random-Access Memory, static random access memory), and further there is a scheme using ping-pong cache. However, the above-men...

Claims

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Application Information

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IPC IPC(8): G06F12/0895G06F12/0868G06F1/3234G06N3/063
CPCG06F12/0895G06F12/0868G06F1/3275G06N3/063G06F2212/1044G06F2212/1016G06F2212/221G06F2212/1028Y02D10/00
Inventor 雷宇李原朱建斌付尧永田敏雄
Owner AZURENGINE TECH ZHUHAI INC
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