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Drawing method and device of AI processor architecture, equipment and medium

A technology of processor architecture and architecture layer, applied in the field of data processing, which can solve problems such as difficulty in drawing, no unified standard for hand-drawn drawings, and error-prone problems.

Active Publication Date: 2022-05-03
北京燧原智能科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, tens of hundreds of hardware components and hundreds of thousands of data channels make it more and more difficult to manually draw AI processor architecture diagrams, and are extremely error-prone
Moreover, there is no uniform standard for the hand-drawing of different teams, which is difficult to pull through. There are often execution or docking errors, resulting in unnecessary cooperation iterations, making the automatic drawing of the AI ​​​​processor architecture with a unified drawing standard an urgent problem in the field of chip manufacturing today. The problem

Method used

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  • Drawing method and device of AI processor architecture, equipment and medium
  • Drawing method and device of AI processor architecture, equipment and medium
  • Drawing method and device of AI processor architecture, equipment and medium

Examples

Experimental program
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Embodiment 1

[0043]There are several partial categories within the processor architecture. The hardware components in the category have independent interconnection to ensure cooperation, and the intercommunication with hardware components outside the category is realized through bridge units or hardware components with bridge functions. The hardware components in the category can be A hardware component group (including at least two hardware components) with the above characteristics that communicates with hardware components outside the category can be called a category, and categories can be nested, paralleled, or infinitely expanded. Hardware components are the basic working units that make up the processor architecture, and can be divided into execution units, bridge units, and bus units according to their functional roles. Execution units can be used to initiate or process data exchange requests, as the starting point or end point of data exchange, and can span multiple categories. Th...

Embodiment 2

[0074] figure 2 It is a flowchart of a method for drawing an AI processor architecture provided by Embodiment 2 of the present invention. The embodiment of the present invention is embodied on the basis of the above-mentioned embodiments. In the embodiment of the present invention, the return execution is given in order of drawing scales from small to large, and the operation of sequentially obtaining the drawing elements of the current drawing architecture layer corresponding to this layer The previous specific optional implementation.

[0075] Such as figure 2 As shown, the method of the embodiment of the present invention specifically includes:

[0076] S210. According to the order of the drawing scales from small to large, sequentially acquire the drawing elements of the current drawing architecture layer corresponding to this layer.

[0077] S220. If it is determined that the current drawing architecture layer does not belong to the top-level architecture layer, orga...

Embodiment 3

[0122] Figure 14 It is a schematic diagram of a drawing device of an AI processor architecture provided in Embodiment 3 of the present invention, as shown in Figure 14 As shown, the device includes: a data acquisition module 310, a first nested layout module 320, a second nested layout module 330, a first data determination module 340, a second data determination module 350 and an AI processor architecture drawing module 360, of which:

[0123] The data acquisition module 310 is used to sequentially acquire the drawing elements of the current layer corresponding to the current drawing architecture layer in the order of the drawing scale from small to large; the drawing elements of this layer include: category model or hardware component model, and the category model includes sub-hardware components models, and / or subcategory models;

[0124] The first nested layout module 320 is used to organize and layout each drawing element of this layer if it is determined that the cur...

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Abstract

The embodiment of the invention discloses a drawing method and device of an AI processor architecture, equipment and a medium. The AI processor architecture drawing method comprises the following steps: obtaining a current layer drawing element corresponding to a current drawing architecture layer; if the current drawing architecture layer does not belong to the top-level architecture layer, organizing and arranging each drawing element; according to a layout result, determining relative offset data of each drawing element relative to the laid parent category model, and returning to execute the operation of obtaining the drawing element of the current layer corresponding to the current drawing architecture layer; if the current drawing architecture layer belongs to the top-level architecture layer, organizing layout of each drawing element, and determining absolute layout data of each drawing element; determining absolute layout data respectively corresponding to each bottom layer drawing element; and drawing an AI processor architecture diagram according to the absolute layout data. According to the technical scheme provided by the embodiment of the invention, the AI processor architecture diagram can be automatically drawn, the drawing standard of the AI processor architecture diagram is unified, and the docking error is reduced.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of data processing, and in particular to a drawing method, device, equipment and medium of an AI processor architecture. Background technique [0002] With the continuous upgrading of the chip manufacturing process, the computing power density (homogeneous or heterogeneous) deployed by the AI ​​(Artificial Intelligence, artificial intelligence) processor on the unit wafer area is getting higher and higher, which in turn leads to the AI ​​processor unit The logic design density in terms of area is constantly increasing, and the number of hardware components of a single chip of an AI processor is increasing exponentially, which puts forward high requirements for the design of the AI ​​processor architecture. [0003] However, tens of hundreds of hardware components and hundreds of thousands of data channels make it increasingly difficult and error-prone to manually draw AI processor a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/392
CPCG06F30/392
Inventor 魏斌
Owner 北京燧原智能科技有限公司
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