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A drawing method, device, equipment and medium of AI processor architecture

A technology of processor architecture and architecture layer, applied in the field of data processing, can solve problems such as error-prone, execution or docking errors, and difficult to pull through

Active Publication Date: 2022-06-17
北京燧原智能科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, tens of hundreds of hardware components and hundreds of thousands of data channels make it more and more difficult to manually draw AI processor architecture diagrams, and are extremely error-prone
Moreover, there is no uniform standard for the hand-drawing of different teams, which is difficult to pull through. There are often execution or docking errors, resulting in unnecessary cooperation iterations, making the automatic drawing of the AI ​​​​processor architecture with a unified drawing standard an urgent problem in the field of chip manufacturing today. The problem

Method used

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  • A drawing method, device, equipment and medium of AI processor architecture
  • A drawing method, device, equipment and medium of AI processor architecture
  • A drawing method, device, equipment and medium of AI processor architecture

Examples

Experimental program
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Embodiment 1

[0043]There are several local categories within the processor architecture. The hardware components in the category have independent interconnection to ensure cooperation, and the intercommunication with the hardware components outside the category is realized through the bridge unit or the hardware components with the bridging function. The hardware components within the category can be A hardware component group (including at least two hardware components) that communicates with hardware components outside the category can be called a category, and categories can be nested, side-by-side, and infinitely expanded. Hardware components are the basic work units that make up the processor architecture, and can be divided into execution units, bridge units, and bus units according to their functional roles. The execution unit can be used to initiate or process a data exchange request, as the start or end point of the data exchange, which can span multiple categories. The bridging u...

Embodiment 2

[0074] figure 2 This is a flowchart of a method for drawing an AI processor architecture according to Embodiment 2 of the present invention. The embodiment of the present invention is embodied on the basis of the above-mentioned embodiment. In the embodiment of the present invention, the operation of returning the execution to obtain the drawing elements of the current layer corresponding to the current drawing architecture layer in the order of the drawing scale from small to large is given. The previous specific optional implementation.

[0075] like figure 2 As shown, the method of the embodiment of the present invention specifically includes:

[0076] S210 , according to the order of the drawing scale from small to large, sequentially acquire the drawing elements of the current layer corresponding to the current drawing architecture layer.

[0077] S220. If it is determined that the current drawing architecture layer does not belong to the top-level architecture layer...

Embodiment 3

[0122] Figure 14 is a schematic diagram of a drawing device of an AI processor architecture provided in Embodiment 3 of the present invention, such as Figure 14 As shown, the device includes: a data acquisition module 310, a first nested layout module 320, a second nested layout module 330, a first data determination module 340, a second data determination module 350, and an AI processor architecture diagram drawing module 360, where:

[0123] The data acquisition module 310 is configured to sequentially acquire the drawing elements of this layer corresponding to the current drawing architecture layer in order of the drawing scale from small to large; the drawing elements of this layer include: a category model or a hardware component model, and the category model includes sub-hardware components models, and / or subcategory models;

[0124] The first nested layout module 320 is used to organize and layout the drawing elements of each current layer if it is determined that t...

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Abstract

The embodiment of the present invention discloses a drawing method, device, equipment and medium of an AI processor architecture. The AI ​​processor architecture drawing method includes: obtaining the drawing elements corresponding to the current drawing architecture layer; if the current drawing architecture layer does not belong to the top-level architecture layer, organizing and laying out each drawing element; The relative offset data of the laid out parent category model returns and executes the operation of obtaining the drawing elements of this layer corresponding to the current drawing architecture layer; if the current drawing architecture layer belongs to the top-level architecture layer, organize the layout of each drawing element and determine the location of each drawing element Absolute layout data; determine the absolute layout data corresponding to each underlying drawing element; draw the AI ​​processor architecture diagram according to the absolute layout data. The technical solution of the embodiment of the present invention can automatically draw the AI ​​processor architecture diagram, unify the drawing standards of the AI ​​processor architecture diagram, and reduce docking errors.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of data processing, and in particular, to a method, apparatus, device, and medium for rendering an AI processor architecture. Background technique [0002] With the continuous upgrading of the chip manufacturing process, the computing power density (homogeneous or heterogeneous) deployed by AI (Artificial Intelligence) processors per unit wafer area is getting higher and higher, which in turn leads to the unit of AI processor. The logic design density in area continues to increase, and the number of hardware components in a single chip of an AI processor increases exponentially, placing high requirements on the design of the AI ​​processor architecture. [0003] However, dozens or hundreds of hardware components and hundreds of thousands of data channels make it more and more difficult and error-prone to manually hand-paint the AI ​​processor architecture diagram. Moreover, there is no...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/392
CPCG06F30/392
Inventor 魏斌
Owner 北京燧原智能科技有限公司
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