Parity verification matrix based decoding method and decoder of the LDPC code

A technology of parity check matrix and LDPC code, which is applied in the direction of error detection coding, encoding, code conversion, etc. of multiple parity check bits, which can solve the problems of unsatisfactory decoding efficiency and resource consumption, and achieve hardware The effect of resource scale reduction and decoding rate improvement

Inactive Publication Date: 2007-07-11
BEIHANG UNIV
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Problems solved by technology

This document proposes a partially parallel decoder and decoding method that is currently common in the field, but it is more suitable for regular codes, and has special requirements for the row weight and column weight of the supervisory matrix, so this The decoding scheme is still unsatisfactory in terms of decoding efficiency for irregular codes, and for LDPC codes with long code length and large matrix size, there is still a resource-consuming bottleneck

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  • Parity verification matrix based decoding method and decoder of the LDPC code
  • Parity verification matrix based decoding method and decoder of the LDPC code
  • Parity verification matrix based decoding method and decoder of the LDPC code

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Embodiment 1

[0039] First narrate the division method of a kind of parity check matrix of the present invention

[0040] FIG. 1 is a splitting method for performing parity splitting on a parity check matrix (hereinafter referred to as "H matrix") used in LDPC decoding.

[0041] The odd-even split method in Figure 1 divides the H matrix into two matrices, namely H 0 Matrix and H 1 matrix. The specific division method is to mark the column in the H matrix as the sub-matrix column of 0 (A 00 A 100  A q0 ) -1 drawn as H 0 The first submatrix column of the matrix, the submatrix column that marks the column in the H matrix as 1 (A 01 A 11  A q1 ) -1 drawn as H 1 The first sub-matrix column of the matrix; follow the same method, sequentially extract the sub-matrix columns in the H matrix and put them into H alternately 0 Matrix and H 1 Matrix, the above sub-matrix columns follow the original order in the H matrix, respectively in the new matrix H 0 and H 1 sorted in. Thus, fo...

Embodiment 2

[0119] On the basis of the CNU unit structure of the decoder described in Embodiment 1, a unit for calculating H×x=0 is added. Specifically, while keeping the structure of the CNU unit in Embodiment 2 unchanged, s XOR units are added, arranged as in the arrangement structure of z XOR units in Embodiment 2 of the original CNU, the purpose is to input The x+1 one-bit information of the CNU is XORed, and a one-bit XOR result is output.

[0120] According to the modification of the structure of the CNU unit in Embodiment 1 in Embodiment 2, certain adjustments need to be made to the control of the controller unit 0 of the decoder, that is, in the embodiment that maintains the decoding steps of the decoder? In the case of the same timing, while the CNU operation of the next iteration cycle is performed, the x calculated for the previous iteration cycle n , carry out the calculation of H×x=0, if the equation is established, the controller unit 0 will issue an instruction to stop the...

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Abstract

This invention provides one LDPC code method and coder based on odd and even metric, which comprises the following steps: firstly cracking the metric; the single new matrix sets the correction point update unit and variable point update unit and planning correction points and variable update computation to process each new matrix for middle information computation to update original whole odd and even matrix point information to repeat above computation steps till the end of codes.

Description

technical field [0001] The invention belongs to the communication field, and in particular relates to a decoding method and a decoder. Background technique [0002] LDPC code, full name Low Density Parity Check Code, that is, low density parity check code. Among existing coding methods at present, the coding method of LDPC code has shown the coding performance close to Shannon's limit (Shannon's limit) in some cases; The error floor (error floor) of the LDPC code appears in a very low bit error rate area, and the probability that the error code word cannot be detected is a very low value very close to 0; the parity check matrix H of the LDPC code is absolutely Most of the elements are "0", which is the origin of the name "low density", and this feature enables it to be decoded by a simple and easy-to-implement decoding method, which has extremely high practical value. Due to the above reasons, LDPC has become a hot spot in research and application in recent years. For exam...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11H03M13/19H03M13/00H04L1/00
Inventor 张晓林赵岭张展苏琳琳
Owner BEIHANG UNIV
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