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Fast arbitration scheme for a bus

a bus and arbitration scheme technology, applied in the field of digital systems, can solve the problems of more time, more complex winnings, and achieve the effect of high frequency operation and more time to compl

Inactive Publication Date: 2005-08-04
AVAGO TECH WIRELESS IP SINGAPORE PTE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010] The problems outlined above are in large part solved by an arbitration apparatus as described herein. A distributed arbitration scheme is used, with arbiters included with each agent. The arbiters receive request signals indicating which agents are arbitrating for the bus. Additionally, the agent currently using the bus broadcasts an agent identifier assigned to that agent. The arbiters receive the agent identifier and use the agent identifier as an indication of the winner of the preceding arbitration. Accordingly, the arbiters determine if the corresponding agent wins the arbitration, but may not attempt to calculate which agent actually wins the arbitration if the corresponding agent does not win. Instead, the winner is indicated via the agent identifier in the transaction. Determining whether or not the corresponding agent wins the arbitration may be performed rapidly, while calculating the exact winner if the corresponding agent is not the winner may be more complex and may require more time to complete. Since the computation may be eliminated in favor of receiving the agent identifier, the arbiter may be capable of high frequency operation.

Problems solved by technology

Determining whether or not the corresponding agent wins the arbitration may be performed rapidly, while calculating the exact winner if the corresponding agent is not the winner may be more complex and may require more time to complete.
Furthermore, the determination of whether or not the corresponding agent wins the grant may be fairly rapid.

Method used

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Examples

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Embodiment Construction

[0029] Turning now to FIG. 1, a block diagram of one embodiment of a system 10 is shown. Other embodiments are possible and contemplated. In the embodiment of FIG. 1, system 10 includes processors 12A-12B, an L2 cache 14, a memory controller 16, a high speed input / output (I / O) bridge 18, an I / O bridge 20, and I / O interfaces 22A-22B. System 10 may include a bus 24 for interconnecting the various components of system 10. As illustrated in FIG. 1, each of processors 12A-12B, L2 cache 14, memory controller 16, high speed I / O bridge 18 and I / O bridge 20 are coupled to bus 24. Each of processors 12A-12B, L2 cache 14, high speed I / O bridge 18, and I / O bridge 20 include an address bus arbiter (A Arb) labeled with reference numerals 26A-26E as illustrated in FIG. 1. Each of processors 12A-12B, L2 cache 14, memory controller 16, high speed I / O bridge 18, and I / O bridge 20 include a data bus arbiter (D Arb) labeled with reference numerals 28A-28F as illustrated in FIG. 1. I / O bridge 20 is coup...

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PUM

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Abstract

A distributed arbitration scheme includes arbiters with each agent. The arbiters receive request signals indicating which agents are arbitrating for the bus. Additionally, the agent currently using the bus broadcasts an agent identifier assigned to that agent. The arbiters receive the agent identifier and use the agent identifier as an indication of the winner of the preceding arbitration. Accordingly, the arbiters determine if the corresponding agent wins the arbitration, but may not attempt to calculate which other agent wins the arbitration. In one embodiment, the arbiter maintains a priority state indicative of which of the other agents are higher priority than the corresponding agent and which of the other agents are lower priority. In one implementation, the bus may be a split transaction bus and thus each requesting agent may include an address arbiter and each responding agent may include a data arbiter.

Description

PRIORITY INFORMATION [0001] This application is a continuation of and claims priority to U.S. patent application having an application Ser. No. 09 / 684,023; filed Oct. 6, 2000, which application is hereby incorporated by reference.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention is related to the field of digital systems and, more particularly, to arbitration schemes for a bus. [0004] 2. Description of the Related Art [0005] A bus is frequently used in digital systems to interconnect a variety of devices included in the digital system. Generally, one or more devices are connected to the bus, and use the bus to communicate with other devices connected to the bus. As used herein, the term “agent” is used to refer to a device which is capable of communicating on the bus. The agent may be a requesting agent if the agent is capable of initiating transactions on the bus and may be a responding agent if the agent is capable of responding to a transaction in...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F13/00G06F13/14G06F13/16G06F13/368
CPCG06F13/368G06F13/1652
Inventor ROWLANDS, JOSEPH B.ANDERSON, DAVID L.DESAI, SHAILENDRA S.
Owner AVAGO TECH WIRELESS IP SINGAPORE PTE
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