Tracking cache coherency in an extended multiple processor environment
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Multiprocessor Component Assembly
[0026]FIG. 1 is a block diagram of an exemplary multiple processor component assembly that is included as one of the components of the current invention. The multiprocessor component assembly 100 of FIG. 1 depicts a multiprocessor system component having multiple processor sockets 101, 105, 110, and 115. All of the processor sockets have access to memory 120. The memory 120 may a centralized shared memory or may be a distributed shared memory. Access to the memory 120 by the sockets A-D 101, 105, 110, and 115 depends on whether the memory is centralized or grouped. If centralized, then each socket may have a dedicated connection to memory or the connection may be shared as in a buss configuration. If distributed, each socket may have a memory agent (not shown) and an associated memory block.
[0027] The sockets A-D 101, 105, 110, and 115 may communicate with one another via communication links 130-135. The communication links are arranged such that ...
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