Methods for fabricating metal gate structures

Abstract

One aspect of the present disclosure is a method of fabricating metal gate by forming a silicon-nitride layer (SiN) over a dummy gate at a second metal gate type transistor region (e.g. NMOS) avoid dummy gate loss during a CMP process for a PMOS gate. The method can comprise after performing a patterning process to remove hard masks at PMOS and NMOS regions, forming a SiN layer over the NMOS region; performing a patterning process to open the PMOS region and filling gate materials in the PMOS region; performing a CMP to polish a top surface of PMOS such that the polishing stops at SiN. In this way, dummy gate loss can be reduced during the first aluminum CMP step and thus can reduce initial height of dummy gate as compared to the convention method, and improve the filling process of the dummy gate as compared to the conventional method.

Description

BACKGROUND OF THE INVENTION[0001]The present invention is directed to semiconductor processes and devices.[0002]Since the early days when Dr. Jack Kilby at Texus Instrument invented the integrated circuit, scientists and engineers have made numerous inventions and improvements on semiconductor devices and processes. The last five decades or so have seen a significant reduction in semiconductor sizes, which translate to ever increasing processing speed and decreasing power consumption. And so far, the development of semiconductor has generally followed Moore's Law, which roughly states that the number of transistors in a dense integrated circuit doubles approximately every two years. Now, semiconductor processes are pushing toward below 20 nm, where some companies are now working on 14 nm processes. Just to provide a reference, a silicon atom is about 0.2 nm, which means the distance between two discrete components manufactured by a 20 nm process is just about a hundred silicon atoms...

AI Technical Summary

Benefits of technology

The present invention provides better methods and techniques for creating shaped cavities in semiconductor devices. These cavities can be easily integrated into existing systems and processes. Additionally, these cavities can be used for manufacturing various types of semiconductor devices, such as CMOS, PMOS, and NMOS. Overall, the invention provides a more efficient and flexible approach to creating highly functional semiconductor devices.

Problems solved by technology

The last five decades or so have seen a significant reduction in semiconductor sizes, which translate to ever increasing processing speed and decreasing power consumption.

Manufacturing semiconductor devices has thus become more and more challenging and pushing toward the boundary of what physically possible.

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