ESD snapback based clamp for finFET
a technology of esd and finfet, applied in the direction of semiconductor devices, electrical apparatus, transistors, etc., can solve the problems of inability to implement esd solutions in integrated circuits, damage to core circuits, and limited current handling ability,
Inactive Publication Date: 2016-05-24
GLOBALFOUNDRIES INC
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- Description
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- Application Information
AI Technical Summary
Benefits of technology
The extended drain configuration effectively reduces current surges during ESD events, minimizing thermal damage and allowing for reliable ESD protection without the need for complex fabrication processes or special layout rules, while maintaining the planarity of the gate and reducing capacitive coupling risks.
Problems solved by technology
High transient currents during electrostatic discharge (ESD) events can cause damage to core circuits.
Current handling ability can be limited by heat generation due to series resistance in the shunting channel.
Implementing ESD solutions in integrated circuits is always challenging.
In one aspect reduced sizes of integrated circuits impose increasing challenges to design of ESD discharge current handling ability of ESD protection devices.
However, in integrated circuits, there are significant challenges to realizing extended drain ESD protection devices given that device structure sizes and spacing distances often cannot be varied without costly variations of process flow.
Method used
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Embodiment Construction
[0021]With reference to FIG. 1, there is set forth herein a semiconductor device 100 including a field effect transistor (FET) 50 configured as an ESD protection device. The FET 50 can include a semiconductor substrate 102, a gate 10 formed on the substrate 102 and a dummy gate 20 formed on the substrate 102 spaced apart from the gate 10. The FET 50 can include a source diffusion region 60 formed in the substrate 102 adjacent a first end 10-1 of the gate 10, and a first drain diffusion region 70 formed in the substrate 102 intermediate of the gate 10 and the dummy gate 20. The first drain diffusion region 70 can be adjacent to a second end 10-2 of the gate 10 and a first end 20-1 of the dummy gate 20. The FET 50 can include a second drain diffusion region 80 formed in the substrate 102, the second drain diffusion region 80 spaced apart from the first drain diffusion region 70.
[0022]A drain of FET 50 in one embodiment can include a first drain diffusion region 70 and a second drain d...
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There is set forth herein a field effect transistor (FET) configured as an ESD protection device. In one embodiment, the FET can be configured to operate in a snapback operating mode. The FET can include a semiconductor substrate, a gate formed on the substrate and a dummy gate formed on the substrate spaced apart from the gate.
Description
FIELD[0001]There is set forth herein a semiconductor device, and more particularly a semiconductor device featured for avoiding current surge failure.BACKGROUND[0002]High transient currents during electrostatic discharge (ESD) events can cause damage to core circuits. For protection of core circuits, ESD protection devices can be employed to clamp voltages applied to core circuits to safe, low levels. ESD protection devices can include, e.g., diodes and field effect transistors (FETs).[0003]According to a first approach for ESD protection, an ESD protection device is arranged to operate in a simple turn on mode during an ESD event. At a turn on voltage, voltage across the ESD protection device can be clamped, and the protection device forms a low impedance shunt channel to discharge ESD transients. Current handling ability can be limited by heat generation due to series resistance in the shunting channel. The turn on clamping voltage should be selected to be low enough for protectio...
Claims
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IPC IPC(8): H01L27/02H01L29/78H01L29/66
CPCH01L27/0266H01L29/66477H01L29/78H01L29/66545H01L29/66628H01L29/66659H01L29/7835H01L29/0847H01L27/027H01L29/785H01L27/088H01L29/66537H01L29/66575
InventorSINGH, JAGARWEI, ANDYNATARAJAN, MAHADEVA IYERPRABHU, MANJUNATHAKUMAR, ANIL
OwnerGLOBALFOUNDRIES INC