CDMA receiver with parallel interference suppression and optimized synchronization

Abstract

A receiver for transmission and parallel interference has multiple access interference suppression stages having K channels, each comprising a correlation device corresponding to a particular pseudorandom sequence and interference generation and suppression device. Each stage delivers to the following stage signals at least partly freed from multiple access interferences. A decision stage receives the signals from the channels of the preceding suppression stage. Each decision stage has a correlation device corresponding to one of the pseudorandom sequences and decision device to deliver data. Devices for producing synchronization signals can control the interference suppression and the decision device. The devices producing the synchronization signals have components placed in the channels of the final stage. Further, the synchronization signals produced by these devices control the decision device of the channels of the final stage and the interference estimation device of the at least one interference suppression stages following appropriate time shifts.

Description

TECHNICAL FIELD[0001]The present invention relates to a CDMA (code division multiple access) receiver with parallel interference suppression and optimized synchronization.[0002]More generally, the invention relates to direct sequence spread spectrum (DSSS) digital transmission.[0003]The invention has applications in radiocommunications systems with mobiles, in wireless local area networks (WLAN), in wireless local loops (WLL), in cable television and online multimedia services, in integrated home systems and electronic funds transfer, etc.PRIOR ART[0004]Direct sequence spread spectrum consists of modulating each symbol of a digital signal by a binary pseudorandom sequence. Such a sequence consists of N pulses or chips, whose duration Tc is equal to Ts / N. The modulated signal has a spectrum spread over a range N times wider than that of the original signal. On reception, demodulation consists of correlating the signal with the sequence used on transmission making it possible to once ...

AI Technical Summary

Benefits of technology

[0055]Thus, the invention renders unnecessary complex calculations for investigating clock signals at all the first stages and consequently considerably reduces the operational complexity of the receiver. This complexity can be further reduced by the use of sliding correlators in the first stages and matched filters in the final stage. As explained hereinbefore, the matched filter makes it possible to acquire the synchronization in a single symbol period, whilst the use of sliding correaltors makes it possible to reduce the operational complexity without deteriorating said acquisition time.

Problems solved by technology

It is also possible to recover the symbol clock with the aid of a sliding correlator, but this is more complex.

Its disadvantage is its operational complexity, because its installation in the form of a finite pulse response digital filter (operating at the speed of the chips multiplied by the number of samples) requires N multiplications and N additions for each sample.

Thus, its structural complexity is linked with its operating complexity.

Although this arrangement makes it possible to obtain a correct operation of the receiver it is still relatively complex.

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