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Cache memory and data manipulation method thereof

A technology for high-speed buffering and data manipulation, applied in memory systems, electrical digital data processing, instruments, etc., to achieve the effects of improving flexibility, improving performance, and reducing data refresh time

Active Publication Date: 2009-07-29
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0022] The technical problem to be solved by the present invention is to provide a Cache and its data operation method to solve the problems caused by the physical division of the Cache storage area in the prior art

Method used

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  • Cache memory and data manipulation method thereof
  • Cache memory and data manipulation method thereof
  • Cache memory and data manipulation method thereof

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Experimental program
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Embodiment Construction

[0053] The present invention will be described in further detail below in conjunction with accompanying drawing and specific embodiment:

[0054] see Figure 4 , which is a structural diagram of the Cache storage area in the present invention, including a Cache block information area and a Cache block data area.

[0055] Wherein, the Cache block information area includes two parts, the read Cache block information area and the write Cache block information area, both of which are used to store the information of each data block in the Cache block data area, and this information includes the relevant information of the data block (such as data Write time, etc.) and data storage address.

[0056] The spatial structure diagram of the Cache block data area is as follows Figure 5 As shown, including the use of the mark table and the data storage area; the use of the mark table is used to store a sequence of marks, and each bit of mark corresponds to a data block in the data storag...

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PUM

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Abstract

The invention discloses a cache memory and a data operating method thereof. The memory area of the cache memory comprises a cache block information area of the cache memory and a Cache block data area; the Cache block information area comprises a read Cache block information area and a write Cache block information area, and is used for storing the information of each data block in the Cache block data area; the information comprises the relevant information of the data block and data storage addresses; and the Cache block data area is used for storing data with the block as the unit. The invention only needs to adjust the proportion of the write Cache block information area and the read Cache block information area in the Cache block information area without massive data copying, thus improving the adjusting flexibility; and when the refresh operation is carried out, only little data copying is carried out, thus reducing the time of data refresh and improving the refresh performance.

Description

technical field [0001] The invention relates to disk array technology, in particular to a Cache (high-speed buffer memory) in the disk array and a data operation method thereof. Background technique [0002] In a disk array, Cache is a special memory consisting of a Cache storage area and a Cache control area. It is used to cache data requested by the host. It is one of the key factors affecting the performance of the disk array. There are usually two ways to organize the Cache. One way is to use the entire Cache storage area for reading data and writing data; the other way is to use different Cache storage areas for reading data and writing data. [0003] Due to different characteristics of read operations and write operations, the read cache and write cache usually use different cache storage areas. In different application environments, or even in the same application environment, disk arrays may have inconsistent read / write ratios. [0004] Such as figure 1 As shown, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F12/08G06F12/06G06F12/0871
Inventor 陈韵霞兰玉龙王洪斌
Owner ZTE CORP
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