Low complexity general time frequency transformation implementing method and hardware implementing architecture

Abstract

The invention discloses a method for realizing low complexity common time frequency conversion, wherein, a new sequence x(n) of N point consisting of N-N zero values is inserted at proximately the middle position of an input sequence x(n); an intermediate result X(k) is obtained by FFT operation carried out to the new sequence x(n) by means of Cooley-Tukey FFT structure; and an FFT result of an original input sequence of the N point is obtained by a numeral sampling conversion with the sample rate of N / N carried out to the intermediate result X(k). The invention also discloses a framework for realizing the low complexity common time frequency conversion. The invention has the advantage of realizing rapid calculation of FFT of any N point on the basis of not changing the sample rate of a system and based on a single and fixed butterfly structure, and is applicable to any system needing to carry out FFT processing of any point, such as a digital television terrestrial broadcasting system.

Description

technical field [0001] The present invention relates to the field of wireless signal transmission, in particular to a low-complexity universal time-frequency transformation realization method; the present invention also relates to a hardware framework for realizing low-complexity general time-frequency transformation. Background technique [0002] Discrete Fourier Transform (FFT) is a commonly used time-frequency transform processing unit in the field of digital signal analysis and processing, and it is also an essential processing unit in a communication system using OFDM (Orthogonal Frequency Division Multiplexing) multi-carrier technology. At the transmitting end of such a communication system, inverse discrete Fourier transform (IFFT) is required to obtain orthogonal multi-carrier signals, and at the receiving end, FFT is required to demodulate the multi-carrier signals. In fact, IFFT can be realized by exchanging the real and imaginary parts of the FFT input and output ...

AI Technical Summary

Problems solved by technology

In addition, in reference (Zhi-XingYang, Yu-Peng Hu, Chang-Yong Pan, and Lin Yang, "Design of 3780-Point IFFFProcessor for TDS-OFDM", Trans of the IEEE on Broadcasting, Vol.48, No. 1, March2002.) It is also mentioned that 4096-point FFT and interpolation can be used to realize 3780-point FFT, but this needs to change the original system sampling rate of 7.56Msps, that is, 8.192Msps sampling rate, which will increase synchronization processing complexity on

[0004] When designing a multi-standard fusion receiver, if base 2 plus base 3, 4, 5, 7, and 9 butterfly computing units are used to realize the structure, the poor reuse of computing units and complex logic will make it difficult Tolerated hardware implementation complexity

If the variable sampling rate interpolation FFT method is used, the hardware implementation complexity brought by the sampling rate change is also unacceptable

Images