Method for operating flash memory and system chip

A system chip and non-volatile storage technology, which is applied to a method of operating flash memory and the field of system chips, can solve problems such as component compatibility problems, and achieve the effect of overcoming incompatibility
CN103150184AInactive Publication Date: 2013-06-12青岛中星微电子有限公司
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
青岛中星微电子有限公司
Publication Date
2013-06-12
Estimated Expiration
Not applicable · inactive patent

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Abstract

The embodiment of the invention provides a method for operating a flash memory and a system chip. The system chip comprises a nonvolatile controller and a nonvolatile storage area. The method comprises the steps of starting firmware arranged in the system chip after the system chip is powered on, initializing the nonvolatile controller and the nonvolatile storage area, reading control data and program data in the nonvolatile storage area through the nonvolatile controller, storing the control data and the program data in an SRAM (static random access memory), skipping to a preset position in the SRAM according to the control data, establishing a read-write channel between the firmware and Nand-flash by executing the initial program data of the firmware and the preset position, and loading programs and data in the Nand-flash to a system chip memory for execution. According to the method and the system chip, no matter how the data in the Nand-flash is changed, the Nand-flash can be loaded successfully, and the problem of available incompatibility is solved.
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Description

technical field

[0001] The invention relates to a chip access technology, in particular to a method for operating a flash memory and a system chip. Background technique

[0002] Nand-flash (a kind of Flash memory) is an important storage medium. Manufacturers have introduced a series of advanced Nand-flash chips with higher capacity density and lower cost. However, the stability of the chip is greatly reduced, and more bits of ECC are required for verification. In the early chips, errors only occurred in erasing and writing operations, but the new Nand-flash can also make errors when reading (read disturbance).

[0003] In order to provide a reliable data reading channel, each manufacturer provides user-defined operation commands in addition to the standard Nand-flash reading and writing interface, and they are not compatible with each other. After the standard data reading fails, the user executes the Read-retry command. The Read-retry command changes the internal level de...

Claims

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