Summation path circuit of carry-save adder and carry-save adder

A path circuit and adder technology, which is applied to the calculation using number system representation, calculation using non-contact manufacturing equipment, etc., can solve the problems of large path delay and weak drive capability of carry-save adder

Active Publication Date: 2014-04-30
LOONGSON TECH CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a summation path circuit and a carry-save adder for partial product compres

Method used

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  • Summation path circuit of carry-save adder and carry-save adder
  • Summation path circuit of carry-save adder and carry-save adder
  • Summation path circuit of carry-save adder and carry-save adder

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Embodiment Construction

[0048] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0049] figure 1 A structural diagram of a summation path circuit of a carry-save adder provided in Embodiment 1 of the present invention, as shown in figure 1 As shown, the summation path circuit may include: an exclusive OR signal generation circuit 11, an exclusive OR signal generation circuit 12, and a transmission gate selection circuit 13; w...

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Abstract

The invention provides a summation path circuit of a carry-save adder and the carry-save adder. The summation path circuit of the carry-save adder comprises an exclusive-or signal generating circuit, a not-exclusive-or signal generating circuit and a transmission gate selection circuit, wherein the exclusive-or signal generating circuit and the not-exclusive-or signal generating circuit synchronously produce exclusive-or signals and not-exclusive-or signals of a first input signal and a second input signal, the transmission gate selection circuit is used for generating and outputting signals according to the exclusive-or signals, the not-exclusive-or signals and a third input signal. The summation path circuit achieves synchronous output of the exclusive-or signals of the first input signal and the second input signal and the not-exclusive-or signals of the first input signal and the second input signal through the exclusive-or signal generating circuit and the not-exclusive-or signal generating circuit so as to enable output relay of the input signals from the rising edge to the falling edge to be balanced and small and facilitate establishing of Wallace trees.

Description

technical field [0001] The invention relates to a carry-save adder, in particular to a summation path circuit and a carry-save adder for a partial product compression carry-save adder. Background technique [0002] The multiplication and addition unit is one of the key computing units in modern high-performance processors. At present, an indispensable link in the operation process of the multiplication and addition unit is the accumulation of partial products. In the multiplication and addition unit, the partial accumulation and addition can quickly reduce the addition of n numbers to the addition of 2 numbers with simple hardware, thereby improving the speed of adding multiple partial products during the multiplication process. [0003] The accumulation of partial products can be performed using a carry-save adder. A carry-save adder is a digital adder that adds m-bit operands. This adder is not eager to transfer the addition carry, but transfers the Save it for the next a...

Claims

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Application Information

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IPC IPC(8): G06F7/50
Inventor 王伟朱建钱丰刘臻
Owner LOONGSON TECH CORP
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