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Wafer Edge Defect Detection Method

A technology of edge defects and detection methods, applied in semiconductor/solid-state device testing/measurement, electrical components, circuits, etc., can solve the problem that the coordinate map cannot correctly display wafer edge defects, etc.

Active Publication Date: 2019-05-31
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a method for detecting wafer edge defects to solve the problem that existing two-dimensional defect coordinate maps cannot correctly display wafer edge defects

Method used

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  • Wafer Edge Defect Detection Method
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  • Wafer Edge Defect Detection Method

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Embodiment Construction

[0028] The method for detecting wafer edge defects proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. According to the following description and claims, the advantages and features of the present invention will be clearer. It should be noted that the drawings are in a very simplified form and all use imprecise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0029] Please refer to image 3 , Which is a flowchart of a method for detecting wafer edge defects according to an embodiment of the present invention. Such as image 3 As shown, the method for detecting wafer edge defects includes the following steps:

[0030] S11: Divide the edge of the wafer into several sub-areas;

[0031] S12: Define different defect codes according to the sub-areas;

[0032] S13: Characterize the sub-region by the coordin...

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Abstract

The invention provides a method for detecting an edge defect of a wafer. The method for detecting the edge defect of the wafer comprises the steps that the edge of the wafer is divided into multiple sub-areas, different defect codes are defined according to the sub-areas, the sub-areas are represented through coordinates of a two-dimensional defect coordinate graph, edge defect information of the wafer is obtained through a detection device, and the edge defect information of the wafer is displayed according to the defect codes. According to the method for detecting the edge defect of the wafer, the positions where edge defects are located are distinguished according to the different defect codes, and thus the edge defect of the wafer can be displayed correctly through the two-dimensional defect coordinate graph.

Description

Technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a method for detecting wafer edge defects. Background technique [0002] For many years, the surface of the wafer, including the front side and the back side of the wafer, has been the focus of defect detection. The edge of the wafer is considered less important, and defect detection is generally not done. However, during the manufacturing process, it is found that the edges of the wafer are very prone to scratches or residual foreign matter. These defects will become a source of contamination, diffuse to the internal area and surface of the wafer, and affect the devices inside the wafer. As the feature size continues to shrink, devices are getting closer to the edge of the wafer, and wafer edge defects have an increasing impact on the process and product yield, especially in the manufacturing process of 65nm and below. Has severely affected the process and ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
CPCH01L22/12
Inventor 翟云云戴腾
Owner SEMICON MFG INT (SHANGHAI) CORP