A method and structure for manufacturing an
integrated circuit device includes forming a storage device in a substrate, lithographically forming a gate opening in the substrate over the storage device, forming first spacers in the gate opening, forming a strap opening in the substrate using the first spacers to align the strap opening, forming second spacers in the strap opening, forming an isolation opening in the substrate using the second spacers to align the isolation opening, filling the isolation opening with an isolation material, removing the first spacers and a portion of the second spacers to form a step in the gate opening, (wherein the second spacers comprise at least one conductive strap electrically connected to the storage device) forming a first
diffusion region in the substrate adjacent the conductive strap, forming a
gate insulator layer over the substrate and the step, forming a gate conductor over a portion of the
gate insulator layer above the step, forming a second
diffusion region in the substrate adjacent the gate conductor and forming a contact over the
diffusion region and isolated from the gate conductor, wherein a
voltage in the gate conductor forms a conductive region in the substrate adjacent the step and the conductive region electrically connects the strap and the contact.