A system and method for realizing video capture, compression and transmission on a SOC
A technology for video compression and stream compression, which is applied in the fields of digital video signal modification, image communication, electrical components, etc. It can solve the problems of low video processing speed, and achieve the effects of convenient development, improved acquisition and conversion speed, and low power consumption.
Active Publication Date: 2018-10-02
CHINA AEROSPACE TIMES ELECTRONICS CORP
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[0004] The purpose of the present invention is to overcome the deficiencies in the prior art, provide a kind of system and method that realizes video acquisition compression transmission on SOC, finish video acquisition compression transmission on the basis of ZedBoard development board, promote whole system video processing speed, overcome The disadvantage of low video processing speed in some other methods
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[0035] Video compression transmission device based on SOC chip such as figure 1 As shown, it includes an AD analog-to-digital converter and an interface chip; the AD analog-to-digital converter collects PAL analog signals and converts them into digital signals, and sends the digital signals to the SOC chip;
[0036] SOC chip includes acquisition module, control module, communication module and data compression module;
[0037] The acquisition module includes a data acquisition submodule, a data conversion submodule, a BRAM ping-pong buffer, the first DMA controller and a communication controller; the data acquisition submodule receives the digital signal output by the AD analog-to-digital converter, and the acquisition is YUV4:2 :2Plane format signal, and send to the data conversion sub-module; the data conversion sub-module receives the YUV4:2:2Plane format signal, and converts it into a YUV4:2:0Packet format digital video signal, and sends it to the BRAM ping-pong buffer; BR...
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The invention relates to a system and method for implementing video capture, compression and transmission on a system on chip. The system captures a PAL (Programmable Array Logic) standard video, and then transmits the PAL standard video to a computer terminal through a serial port after the PAL standard video is compressed through an H.264 protocol, decodes and displays the PAL standard video synchronously; the system comprises video capture, video coding, code stream transmission and computer terminal decoding and display; in video capture, an analog to digital converter is used foracquiring the PAL standard video to obtain a digital video signal, and separating a YUV 4 to 2 to 0 video signal from the digital signal; in video coding,compressed encoding based on the H.264 protocol is performedon an obtained YUV 4 to 2 to 0 video frame; in code stream transmission,a compressed code stream generated by a coding module is transmitted to a computer terminal program through the serial port; and the computer terminal program decodes the received code stream and displays images in real time. The system has the characteristics of being miniaturized, and flexible in application; two CPU (Central Processing Unit) cores using an SOC (System On Chip) processor perform coding and transmission control, and the processing capacity is strong; and an FPGA (Field Programmable Gate Array) is used for performing video capture and separation and controlling direct memory access and transmission.
Description
technical field [0001] The invention relates to a system and method for realizing video acquisition, compression and transmission on an SOC, and belongs to the field of video compression. Background technique [0002] With the rapid development of today's society, digital video storage and communication are widely used. Due to the huge amount of original video data, effective video compression is very necessary, which can greatly reduce the amount of video data and greatly promote video storage and transmission. [0003] The ARM+FPGA architecture has begun to emerge in the field of image and video compression processing, and the unique ARM+FPGA single-chip architecture of the Zynq series and the excellent dual-core processor performance of the Cortex-A9 can perform complex digital data processing. However, the current domestic H.264 video capture, compression and transmission system based on this architecture is in its infancy, and there are few related achievements. How to...
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IPC IPC(8): H04N19/42H04N19/423
CPCH04N19/42H04N19/423
Inventor 岳建永许旌阳赖永安张俊明张静王毅兰
Owner CHINA AEROSPACE TIMES ELECTRONICS CORP
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