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A processing method and device for multiplication and accumulation operations

A processing device and multiplication and accumulation technology, applied in the computer field, can solve the problems of low computing parallelism, low data throughput, low data processing efficiency, etc.

Active Publication Date: 2019-03-08
HONOR DEVICE CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Embodiments of the present invention provide a processing method and device for multiply-accumulate operations, which are used to solve factors such as data correlation between multiply-accumulate instructions in the prior art, due to pipeline stalls, low calculation parallelism, and low data throughput. The resulting low data processing efficiency and high computer power consumption

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  • A processing method and device for multiplication and accumulation operations
  • A processing method and device for multiplication and accumulation operations
  • A processing method and device for multiplication and accumulation operations

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Embodiment Construction

[0089] In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0090] Embodiments of the present invention provide a processing method and device for multiply-accumulate operations, which are used to solve the problem of processing multiply-accumulate instructions with a multiply-accumulate operation unit in the prior art. When there is data correlation between multiply-accumulate instructions, due to pipeline stalls, Moreover, due to reasons such as low calculation parallelism and low data throughp...

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Abstract

The invention discloses a processing method and device for multiplication and accumulation operation, used for solving the problems of low data processing efficiency and high power consumption of a computer in the prior art. The method comprises the following steps of distributing a register identifier to each read multiplication and accumulation instruction, after processing each multiplication and accumulation instruction to obtain an add operand, taking the add operand and the register identifier distributed to the multiplication and accumulation instruction as binary groups to cache, reading one binary group as a reference binary group, taking the add operand included in the reference binary group as the first add operand, reading an associated binary group, taking the add operand included in the associated binary group as the second add operand, or, reading data in a register corresponding to the register identifier included in the reference binary group as the second add operand, generating an add calculation result based on the first add operand and the second add operand, and storing the add calculation result in the source of the second add operand. Thereby, the calculation parallelism, the data throughout and the data processing efficiency are increased; and the power consumption of the computer is reduced.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to a processing method and device for accumulation operation. Background technique [0002] In the data processing process of computer modern image processing, scientific computing, cloud computing and other fields, there are usually a large number of multiply-accumulate operations, such as matrix multiplication, and its basic operation is multiply-accumulate. The formula of the multiplication and accumulation operation is C+=A*B, which means that A*B is calculated first, then the calculation result is added to the accumulation register C, and the added result is written back to the accumulation register. Each matrix multiplication operation, Multiple multiply-accumulate operation units are required, wherein each multiply-accumulate operation unit further includes a multiplier and an adder. [0003] Since the matrix multiplication operation is a calculation-intensive oper...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/52
Inventor 汪涛张广飞蔡卫光
Owner HONOR DEVICE CO LTD
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