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A design method for special-shaped pipelines based on fpga local dynamic reconfiguration technology

A technology of dynamic reconfiguration and design method, applied in the field of microelectronics, which can solve the problems of less research on fine-grained reconfiguration of local dynamic reconfiguration technology and no deployment of complete solutions for large-scale digital circuits.

Active Publication Date: 2021-08-20
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] At present, there are many research works on FPGA reconfigurable computing, but most of them are limited to the category of coarse-grained reconfiguration. There are few studies on fine-grained reconfiguration based on local dynamic reconfiguration technology, and there is no deployment of large-scale digital circuits on FPGA. Efficient complete solution

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  • A design method for special-shaped pipelines based on fpga local dynamic reconfiguration technology
  • A design method for special-shaped pipelines based on fpga local dynamic reconfiguration technology
  • A design method for special-shaped pipelines based on fpga local dynamic reconfiguration technology

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Embodiment Construction

[0041] The present invention will be further elaborated below in conjunction with a specific embodiment. Embodiment is only used to illustrate the present invention rather than limitation of the present invention:

[0042] Embodiment: the total number of user logic units is 6, and the total number of reconfigurable blocks divided on the FPGA chip is 3, that is, n=6, m=3. can get figure 1 The pipeline reconstruction sequence and data flow diagram are shown. There are 3 reconfigurable blocks in the figure, M from top to bottom 1 , M 2 , M 3 , corresponding to 6 user logical units: N 1 ,N 2 ...N 6 .

[0043] According to the special-shaped pipeline design method based on the FPGA local dynamic reconfiguration technology proposed by the present invention, the operation of each pipeline cycle is as follows:

[0044] (1) In the 0th pipeline cycle (when powered on), block M 1 Dynamic Reconfiguration User Logical Unit N 1 ;

[0045] (2) In the first pipeline cycle, block M...

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Abstract

The invention belongs to the technical field of microelectronics, in particular to a special-shaped pipeline design method based on FPGA local dynamic reconfiguration technology. The present invention utilizes the FPGA local dynamic reconfiguration technology to divide several local reconfigurable blocks on the FPGA, which are dynamically reconfigured sequentially during operation, and the programmable logic resources of the FPGA are cyclically reused by exchanging time for space, so that the original Large-scale applications that cannot be deployed on a single FPGA can be fully presented, which largely breaks through the limitations of FPGA hardware resources; in addition, the reconstruction process of the reconstruction block is used as an independent pipeline stage, which is carried out in parallel with the operation process of user logic , significantly increasing the computational viscosity. When the pipeline is saturated, all calculation-reconstruction processes, result output, and data input processes are in a deep pipeline state, achieving the optimal system throughput and acceptable operation delay under the same resource consumption. The invention has strong versatility and expansibility.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a special-shaped pipeline design method based on FPGA local dynamic reconfiguration technology. Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, FPGA) is a general-purpose programmable logic device, and users can flexibly configure FPGA according to needs to realize different circuit functions. However, FPGA's on-chip logic resources (including programmable resources such as LUT, BRAM, and DSP) are usually limited, making it difficult to completely deploy large-scale digital circuits on a single FPGA board. [0003] FPGA manufacturers (including Xilinx and Intel, etc.) have provided local dynamic reconfiguration technologies suitable for their respective chips, which allow some circuits on the FPGA to remain unchanged during operation (called static circuits), and at the same time reconfigure several local circuits o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/34
CPCG06F30/331
Inventor 陈更生叶汉辰倪思宇黄超
Owner FUDAN UNIV
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