83 results about "Data flow diagram" patented technology

The invention relates to the technical field of low-power-consumption AI processors, and discloses a novel real-time data processing method and chip for calculating a low-power-consumption AI processor, and the method comprises the steps: carrying out the neural mimicry classification processing of a calculation task inputted by the low-power-consumption AI processor, and obtaining a calculation task feature matrix; performing multi-dimensional mapping operation on the calculation task feature matrix to obtain a heterogeneous calculation space vector; performing core resource allocation based on the heterogeneous calculation space vector to obtain a dual-mode processing unit configuration matrix; constructing a storage and calculation integrated data path based on the dual-mode processing unit configuration matrix to obtain a parallel calculation data flow diagram; executing dynamic voltage frequency mapping on the parallel computing data flow diagram to obtain a power consumption optimization control vector; and inputting the power consumption optimization control vector into the trained pulse neural network model to carry out computing power load balancing calculation and generate computing power load balancing parameters, and the method improves the real-time data processing capability of the low-power AI processor.

The invention relates to the technical field of chip compiling and mapping, in particular to a coarse-grained reconfigurable chip mapping method and device based on pre-scheduling. The method comprises the following steps: compiling an intermediate representation through the front end of a compiler according to an input program; constructing a data flow diagram structure according to the intermediate representation; carrying out pre-scheduling according to the data flow diagram and the reconfigurable chip structure information to obtain an operation time period; searching the mapping result according to a pre-allocated time period, and determining a final mapping scheme; configuration information for execution on the coarseness reconfigurable chip is generated. According to the method, the complexity of a mapping algorithm can be effectively reduced, the execution performance of the task on the coarseness reconfigurable chip is improved, heterogeneous resources on the coarseness reconfigurable chip are fully considered in the mapping process, the method is suitable for multi-node and complex-structure data flow diagram mapping in complex tasks, and the mapping efficiency is remarkably improved.

The invention discloses a data flow direction management method and system. The method comprises the steps of obtaining a first data flow diagram created by a target object and performing compliance verification; analyzing the first data flow diagram and the verification result through a dynamic topological optimization engine to obtain a first data flow arrangement scheme and executing the first data flow arrangement scheme; in the execution process, monitoring the index state of a preset key node in the first data flow arrangement scheme in real time, periodically checking the data asset change of the data source, and generating an asset version map; analyzing and positioning the exception of the key node and generating an exception handling strategy; and when the key data assets are changed, analyzing the asset atlas and the first data flow direction arrangement scheme by using a dynamic topological optimization engine, and obtaining and executing a reconstructed second data flow direction arrangement scheme. The technical problems that a dynamic asset recognition blind area exists in a traditional data flow direction management scheme, compliance verification is disjointed with the process, and the overall automation degree is low are solved.

The invention provides an MCM-GPU-oriented resource storage optimization method, device and equipment, and the method comprises the steps: carrying out the static analysis of an operator-level data flow diagram of a calculation task in a compiling stage, and extracting the data dependence relation and life cycle characteristics of each operator; generating a storage optimization scheme based on the data dependency relationship and life cycle characteristics of each operator; in the operation stage, task and data collaborative allocation is carried out according to a data prefetching strategy and a data replacement strategy, task and data collaborative allocation and the calculation task are executed in parallel, and a data flow diagram and an operator dependency relationship of the task are analyzed by utilizing a compiling period; in combination with the data locality characteristics of the MCM-GPU multi-level storage architecture and the concurrency requirements of different modules for data access, an appropriate GPU module is selected to carry out data optimization management, so that frequent data exchange between a GPU and a CPU is reduced, and the performance potential of the MCM-GPU architecture in a super-large-scale task is brought into full play.

The invention provides a core particle type selection method, which comprises the following steps: S1, acquiring a core particle library in a data form constructed according to a specified core particle library specification, the core particle library containing a plurality of core particles and description files thereof; s2, obtaining a to-be-accelerated application, obtaining the application, and converting the application into a task data flow diagram by using a semantic matching rule, the task data flow diagram comprising operators and dependency relationships thereof; s3, according to the core particle library and the task data flow diagram, performing multiple times of grouping mapping for each core particle combination based on the multiple core particle combinations, calculating performance indexes of each task grouping mapping scheme, and determining an optimal core particle combination according to the performance indexes of the task grouping mapping schemes, the task grouping mapping scheme comprises a plurality of mapping relations, and each mapping relation comprises an operator in an application, a grouping serial number of the operator and an operation core grain distributed for the operator. According to the method, the model selection efficiency and quality of the core particle integration system can be improved, and the time overhead and cost of manual model selection are reduced.

The invention provides an end-to-end compiling method of a coarse-grained reconfigurable array based on hierarchical data streams, and relates to the technical field of automatic compilation, and the method comprises the following steps: converting a to-be-compiled programming code into an optimized intermediate representation of an MLIR, converting the optimized intermediate representation into a front-end data stream of a plurality of hierarchical data streams, converting the front-end data stream into a CGRA rear-end data stream according to a preset unloading strategy, and storing the CGRA rear-end data stream in the optimized intermediate representation; and unloading the Kernel kernel code to obtain a target kernel code so as to generate CGRA mapping configuration information of the kernel code data flow diagram. And finally, constructing and obtaining an executable file in combination with a host object file generated by the host side code. Through the method and the device, the problems that during CGRA end-to-end compiling, the accelerated kernel code is labeled through manual proma labeling, so that code editing is time-consuming and labor-consuming, data transmission and link of a host side code and a CGRA kernel side code are ignored, and the CGRA acceleration performance cannot be effectively exerted are solved.

The present application relates to an application anomaly detection method and apparatus, and an electronic device. The method comprises: constructing a data flow diagram and a first program flow diagram on the basis of a selected source data set, and preprocessing the first program flow diagram to obtain a second program flow diagram; performing static call analysis and dynamic call analysis on the data flow diagram and the second program flow diagram, respectively, and determining a program point set to be monitored, an application program corresponding to said program point set, and a plurality of sample call sequences when the application program is correctly run; generating a hidden Markov model (HMM) on the basis of the plurality of sample call sequences, the first program flow diagram and the second program flow diagram, and monitoring the application program by means of the HMM; and when it is detected that the application program is run, acquiring a call sequence during this instance of running the application program, inputting the call sequence into the HMM to obtain a transition probability of the call sequence, and when the transition probability is greater than the current threshold value of the HMM, outputting a result indicating that the application program is abnormal. The method can accurately detect application anomaly data.

The invention discloses a heterogeneous multiprocessor neural network operator scheduling method and device, equipment and a medium, and relates to the technical field of computers. Comprising the steps that a target neural network model is acquired and analyzed to obtain a data flow diagram, and the data flow diagram is stored in a preset storage space; obtaining input data for the target neural network model, and preprocessing the input data to obtain a corresponding data processing result; creating a data mapping table based on the data processing result and the data flow diagram, and sending the data mapping table to the accelerator; and the accelerator calculates the input data by scheduling an accelerator operator based on the data flow diagram and the data mapping table so as to obtain output data. Therefore, the interaction frequency between the central processing unit and the accelerator is reduced in the process of executing the calculation task, and the resource utilization rate and the calculation efficiency of the whole heterogeneous multi-core processor system are improved.

The invention relates to a fine-grained multi-operator parallel scheduling method and system based on a heterogeneous data stream architecture. The method comprises the steps that an operator topological graph is established according to operators obtained through decomposition and related to the task scheduling process, and an operator data flow graph is constructed; analyzing a data dependency relationship among operators in a task according to the operator topological graph, grouping the operators based on the data dependency relationship and the runtime characteristics of the operators, and maintaining a corresponding scheduling queue for each operator group; scheduling the parallel operator group according to the scheduling queue, and allocating computing resources for the parallel operators based on runtime characteristics; performing data flow diagram dynamic reconstruction on the original operator data flow diagram of the parallel operator group according to the operator data flow diagram; and after the PE data flow array finishes executing the operators in parallel, checking whether each scheduling queue is empty or not, if so, ending operator scheduling, and otherwise, continuing to schedule the parallel operator group according to the scheduling queues. According to the method, the access to the SPM can be reduced, and multi-operator efficient parallel scheduling is realized.

The present invention provides a method for optimizing a data stream, comprising: converting a plurality of Extract-Transform-Loads (ETLs) into a dataflow graph, the dataflow graph comprising a plurality of data processing courses, each data processing course comprising a plurality of data nodes, executing a first merge procedure comprising: repeatedly finding out at least two data processing courses having the same node, and combining the at least two data processing courses having the same node with the at least two data processing courses having the same node, the at least two data processing courses having the same node, the at least two data processing courses having the same node, the at least two data processing courses having the same node, and the at least two data processing courses having the same node; and merging the at least two data processing courses into a data family until any two of the data processing courses do not have the same node, executing a second merging program, including: calculating the column similarity of a node pair, the node pair being two adjacent data nodes in the data processing courses, the two data nodes are merged when the column similarity is greater than a threshold, and the dataflow graph is converted into an optimization script when the column similarity of the node pair is not greater than the threshold. According to the optimization method, the data flow diagram can be effectively and automatically generated.

The invention discloses a data stream display method and device, a nonvolatile storage medium and electronic equipment. The method comprises the following steps: determining a data interaction record of a target system; verifying the data interaction record to obtain a verification record and interaction risk information; a data blood relationship in the target system is determined, a data flow path vector diagram is established according to the data blood relationship, the verification record and the interaction risk information, the data flow path vector diagram comprises nodes and directed edges, the nodes correspond to all modules in the target system, and the directed edges are used for indicating the data flow direction and flow path in the system; the annotation information of the directed edge comprises interaction risk information and a verification record; according to the data flow path vector diagram, a visual data flow diagram is generated, and the data flow diagram comprises annotation information. The technical problem that data security is affected due to the fact that data interaction risks existing in a system cannot be found in time in related technologies is solved.

The invention discloses a supply chain data and model mapping method, integration method and system, and the method comprises the steps: obtaining the business data information of each node of a supply chain, and the business data information comprises the business activity and the data flow direction; constructing a service data flow diagram according to the service data information; constructing a service directed graph according to the service data flow graph, and obtaining a service directed graph set; obtaining a target directed graph of the model, traversing the business directed graph in the business directed graph set, and performing isomorphism judgment on the business directed graph and the target directed graph to obtain an isomorphic business directed graph isomorphic with the target directed graph; generating a data mapping rule according to the target directed graph and the isomorphic business directed graph; and establishing mapping between the supply chain data and the model according to the data mapping rule. The problems of low supply chain data integration processing efficiency, low accuracy and high cost are solved.

The invention discloses a coarse-grained reconfigurable architecture cyclic mapping method and device based on a graph neural network, and relates to the technical field of computer reconfigurable computing. The method comprises the following steps: based on a priority prediction model, performing list scheduling according to a data flow diagram and hardware information to obtain a list scheduling table; performing modular scheduling according to the data flow diagram and the hardware information; pre-scheduling the data flow diagram on the basis of a list scheduling table according to the modular data flow diagram and the time extension coarse-grained array to obtain a time step attribute data flow diagram; obtaining a mapping result by using a mapping algorithm based on pattern diagram matching according to the time step attribute data flow diagram on the basis of the time extension coarse-grained array; based on the hardware information, processing unit isomorphism verification is carried out according to the mapping result; and compiling the verified mapping result to obtain an executable configuration information file. The invention provides an efficient and accurate coarse-grained reconfigurable architecture cyclic mapping method based on a graph neural network.

The invention discloses a CGRA multi-task dynamic resource allocation method and a hardware circuit, and belongs to the technical field of dynamic resource allocation. The method specifically comprises the following steps: recording the attribute of each task by using a task attribute table; updating a task attribute table according to a central processing unit message, and generating a task queue and a Boolean value for triggering dynamic resource allocation; the number of processing units is calculated and allocated according to task priorities and the number of data flow diagram nodes; determining the shape of the distributed processing unit according to the number of the distributed processing units; pre-loading the configuration information into a configuration memory of the processing unit so as to match the shape of the allocated processing unit; and dynamic resource allocation is realized by using a finite-state machine. According to the hardware circuit, on the basis of an original CGRA circuit architecture, a dynamic resource distributor, a configuration transmission bus between processing units and configuration receiving circuits in the processing units are added. According to the method, dynamic resource changes caused by task creation and destruction can be flexibly handled.

The invention discloses an intelligent contract fraud detection method and system based on multi-view comparative learning, belongs to the technical field of block chains, in particular to the technical field of intelligent contract security detection, and solves the problem that an existing intelligent contract fraud detection method is highly dependent on labeled data. The method comprises the following steps: performing strong, medium and weak data enhancement on a given intelligent contract code to generate a plurality of enhanced views; performing feature vector extraction on the code of each enhanced view and the data flow diagram thereof, and obtaining feature representation of each view by using an encoder; constructing a comparison matrix based on the feature representations of the plurality of views, and training a feature extractor through a comparison loss function; training a semi-supervised classifier through the annotation data, the pseudo tag data and the output of the feature extractor, optimizing the classifier through a joint loss function, and finally obtaining a trained classifier; and performing fraud detection on new smart contract code extraction features by adopting the trained classifier. The method is used for intelligent contract fraud detection.

The invention discloses a scheduling-driven high-level comprehensive array division method, which comprises the following steps of: creating an associated access instruction set for arrays in algorithm design, and analyzing an address calculation expression of each access instruction; on the basis of the control data flow diagram designed by the algorithm, instruction scheduling is executed according to an instruction topological sequence and circuit performance requirements, for an array access instruction, a schedulable interval of the array access instruction is calculated, control steps in the interval are traversed, and incremental address conflicts introduced by each scheduling mode are determined; aiming at each scheduling mode of the array access instruction, a minimum overhead array division scheme capable of solving all address conflicts is searched, and the overhead of the division scheme comprehensively considers the number of storage modules after division, address control logic complexity and time delay; the address conflicts comprise the incremental address conflicts and the stock address conflicts. The method has the advantages that compared with an existing array division scheme, calculation scheduling and array division are organically combined, the cost of array division is reduced, and the scheduling performance is improved.

The embodiment of the invention provides a software vulnerability mining method and device based on static analysis and big and small model collaboration.The method comprises the following steps that attack faces are recognized and classified, and a code line annotation node set is generated; performing first-stage filtering on the code line annotation node set based on rules, and performing second-stage filtering on the annotation node set after primary filtering based on a twin neural network; taking a high-confidence node in the high-confidence attack surface set as a tracking starting point, generating a basic data flow diagram, obtaining a front-edge node set through static analysis, expanding the front-edge node set through a large language model and a path expansion algorithm, and generating a complemented data flow diagram; and detecting vulnerabilities based on the complemented data flow diagram to obtain a software vulnerability mining result. According to the scheme, through cooperation of the large language model and the twinning neural network, the false alarm rate is reduced, and the coverage rate and accuracy of vulnerability mining are improved.

The images represented in the image diagrams are interactive graphical user interfaces (GUIs) that visually convey information to a user related to systems for (i) creating and / or modifying and / or analyzing unit operations and data generated therefrom in manufacturing processes, such as cell and gene therapy manufacturing processes, (ii) combining live data from databases with textual information, and (iii) interactive analysis of data (e.g., patient data visualization systems) and analysis of data related to manufacturing processes. (A. Graph-Based Visualization and Interactive Data Views for Pharmaceutical Manufacturing Process Data Reconciliation) For example, in certain embodiments, the images represented in the image diagrams are associated with graph-based visualization tools that enable a user to analyze data related to one or more experiments and / or manufacturing processes used to produce pharmaceutical products and / or variations thereof. In particular, the images for graph-based visualization and data analysis GUI tools represented in the image diagrams can be used in association with GUIs that enable a user to automatically and / or semi-automatically (e.g., in conjunction with user review and / or input) generate visualizations that facilitate the examination of experiments and / or manufacturing processes and reconcile data generated across multiple processes and / or process runs. For example, among other things, the interactive graph-based visualization tools and their images may be provided (e.g., rendered) individually or together via one or more GUIs or windows, sub-windows, panels, etc. (Process Graph) For example, the image diagram illustrates a GUI that provides a visualization of a process graph. In one embodiment, the graph-based visualization tool represented in the image diagram includes generating and / or rendering a process graph that displays an experimental and / or manufacturing process for the production of pharmaceutical products, including biologics such as cell-based therapeutics and biologic drugs. The process graph includes multiple nodes, each representing a data point corresponding to a unit operation in a particular experimental and / or manufacturing process where information is collected and / or an action is performed.The image diagrams further illustrate various approaches for capturing and / or displaying these data points and how users interact with them. (Comparing and Reconciling Multiple Processes) In certain embodiments, the images depicted in the image diagrams are used as GUIs to provide graph-based visualization tools that provide comparison and / or reconciliation of data from multiple experiments and / or manufacturing processes, e.g., in an automated and / or semi-automated manner (e.g., coupled with user interactions such as review and selection actions). Among other things, the images depicted in the image diagrams include designs that overlay multiple graph processes, structurally compare them, and reconcile them based on data points. For example, the images depicted in the image diagrams may provide rendering data created by process comparison and reconciliation tools that (e.g., automatically) identify and address discrepancies, missing data, or anomalies, which can be used to generate a harmonized data set for further analysis, such as mathematical modeling. Thus, among other things, the graph-based visualization tools provided in the images depicted in the image diagrams address the challenges presented by unreconciled data across multiple experiments and / or manufacturing processes and / or within a single process that may be performed under varying conditions. Achieving automated reconciliation of such data is a significant challenge that, if not addressed, hinders effective and accurate analysis, which, in turn, can dramatically impact a user's and / or organization's ability to optimize and / or maintain manufacturing process quality and / or develop new processes. In particular, the images presented in the graph-based visualizations and the graphical representations that present them aid in adjusting sampling points to maximize overlay for effective comparisons and / or, in certain embodiments, identify overlapping points in existing data for effective real-time analysis. For example, the graphical representations show examples of multiple levels of data views and clickable / expandable pop-ups. In particular, in certain embodiments, the graphical representations are associated with GUIs that integrate the ability to collect and link actual data with process diagrams.For example, multiple levels of data can be viewed in an interactive and dynamic manner. For example, images presented in pictorial diagrams provide a high-level view, and while not all data may be directly visible, they provide clickable / expandable, customized, dynamic nodes for each node type, allowing users to simultaneously inspect and analyze collected and / or input data. In this manner, images presented in pictorial diagrams facilitate the identification and analysis of differences between processes. In some embodiments, structural differences between different processes indicate variations in conditions (e.g., temperature, duration, chemical concentrations), as well as the sequence and / or presence of certain steps. While unit operations (basic steps or stages in a process) may be generally similar to other processes, unique conditions and / or sequences can significantly affect the outcome, or the nature of the product or result. Thus, images presented in pictorial diagrams that provide visual display tools can be extremely useful in process optimization, troubleshooting, and ensuring that a process meets desired specifications. For example, changing the device that performs a unit operation and / or certain parameter values ​​within the unit operation (e.g., rotation speed, total volume, duration, etc.) can have a significant impact on the quality, recovery, efficacy, etc. of the output of that unit operation, which in turn can affect characteristics such as the biological / potency of the product, and additionally or alternatively, factors such as the cost of production, the number of doses produced per manufacturing run, and the like. Thus, among other things, images depicted in pictorial diagrams can be associated with and provided with GUIs that present generated data, such as automatically generated data (e.g., using ontologies), which helps to identify commonalities and / or differences between studies and facilitates performing analyses to determine, for example, whether device or parameter changes have significant impacts.In particular, as described herein, a graph-based visualization tool represented in a pictorial diagram provides a user with a visual representation of one or more manufacturing processes via a graph-based approach that easily communicates and highlights differences in conditions and unit operations, as well as their nature. For example, an image represented in a pictorial diagram may include visual features that highlight unreconciled data points. This approach facilitates the identification and correction of data reconciliation issues, thereby streamlining data analysis for research and process development conducted in the creation and production of pharmaceuticals, such as cell-based therapeutics and biologic drugs. (i. Process Graph with Interactive Nodes) The pictorial diagram illustrates an example of a graph-based visualization of a manufacturing process. As shown in the pictorial diagram, a manufacturing process can be represented and displayed via a process graph. Each node in the process graph displays a data point corresponding to a unit operation in the particular manufacturing process that it (e.g., the process graph) represents. The node may include information about the current data state and content (e.g., in real time) of the data point it represents. Within a graph-based visualization, nodes can be dynamic, such that, for example, a user interaction with a particular node (e.g., a mouse hover, click, touchscreen tap or long press, etc.) triggers the display of a tooltip indicating the current data state for the displayed data point, including data collected at various stages of the manufacturing process. Process graphs can be rendered and used for experiment design and process execution to outline complex manufacturing experiments over multiple days of manufacturing procedures and to visualize and track different stages of a real-time experiment.Experimental Overview: In some embodiments, a graph is displayed as an experimental overview, providing a high-level overview of an experiment, including the process steps and (e.g., approximate) order in which they were performed, the dates particular process steps were performed, how the process steps relate to one another (e.g., the top half of FIG. 1A ), and an overview of the various states / arms evaluated during the experiment and how those states relate to one another (e.g., the bottom half of FIG. 1A ). Timeline: In some embodiments, a process graph may include a timeline, displaying multiple timepoints, such as the days, during which a particular experiment or manufacturing process represented by the graph was performed. As shown in the image depicted in the pictorial diagram, the timeline may be displayed along the horizontal axis, with labeled circular icons used to visually represent individual timepoints (e.g., days of execution from day 1 through day 21). Other ways of visually displaying the timeline may be used, for example, along the vertical axis and / or using other shaped icons, other units (e.g., hours, weeks, etc.). Process Unit Operations: In some embodiments, a process graph may visually identify individual process unit operations performed during a manufacturing process. Individual process unit operations may be displayed, for example, through a combination of text labels and icons or markings that convey the particular unit operations performed and, optionally, the time at which they are carried out and / or their (e.g., temporal) relationship with respect to other unit operations. For example, the graph-based visualization shown in the image depicted in the pictorial diagram includes a series of text labels along the top row (of nodes) identifying various unit operations such as "Material Preparation," "Start-Up," "Transduction," and "Compounding." In one embodiment, as shown in the image depicted in the pictorial diagram, for example, the text labels also include a numerical component and identify the particular day on which each unit operation is performed, and the text labels are arranged sequentially from left to right along the horizontal axis to mark the order in which the operations are performed over time.The vertical dotted lines extending downward from each text label provide a visual guide for the expected schedule for each unit operation and / or a temporal mapping of the manufacturing process. (Data Points (Nodes)) As shown in the images depicted in the pictorial diagrams, data points in the manufacturing process associated with a particular unit operation and from which pertinent information (measurements and / or recorded observations) is collected are represented via nodes. Nodes may be rendered as icons such as filled circles as shown in the images depicted in the pictorial diagrams. In the images depicted in the pictorial diagrams, each circle is a node and is positioned so as to be visually aligned with a particular unit operation. That is, in the images depicted in the pictorial diagrams, it is located on a vertical dotted line extending downward from a text label identifying a particular unit operation, thereby identifying the data point related to that particular unit operation. (Connectivity) In some embodiments, the process graph may display the dependency or sequence of material and / or data flow from one unit operation to another via rendered connections between the various nodes. For example, as shown in the image depicted in the pictorial diagram, node connectivity may be rendered as lines connecting nodes across a timeline. (Data Connection Points) Specific points along the process where data is collected are marked, such as important checkpoints for quality control or measurements required for process evaluation. (Arms) In some embodiments, a process graph may include and / or display one or more (e.g., separate) arms, each representing a different experimental condition and / or baseline process variation. For example, in the image depicted in the pictorial diagram, the arms are rendered as various smaller graphs positioned below the timeline. Each line in the arms section indicates a different arm / condition as defined by the operator.Labels are provided to help clarify the focus of these steps and / or to distinguish and identify nodes as belonging to one condition, so that corresponding data collected from the laboratory are placed in the correct node and we do not mix data across conditions. In this case, the base process may be the step following a standard or control process, while other processes are steps that make experimental changes to that process or supplement the base process (e.g., making media, preparing materials, etc.). (Baseline Process and Base Process Graph) A baseline process may be a control and / or standard procedure and may be rendered as a base process graph. Text labels, color schemes, icon styles, positioning, and the like may be used to visually identify the baseline process, such as in graph-based visualizations. For example, in images presented in pictorial diagrams, the baseline process is identified and displayed as a node line directly below the timeline. In process graphs of images presented in pictorial diagrams, the baseline process may be the standard process against which other variations are compared. Variations and Outputs / Endpoints In some embodiments, a graph-based visualization can include one or more auxiliary subgraphs, each corresponding to and representing variations to experimental conditions and / or baseline versions of a manufacturing process. For example, the image depicted in the image diagram shows auxiliary subgraphs displaying variations labeled as "Ver1.1," "Ver1.2," "Ver2.1," "Ver2.3," etc., and "Condition 1," "Condition 2," "Condition 3," etc., representing different experimental arms or conditions. In this manner, the graph-based visualization tool can be used to communicate variations in materials used, process conditions, or specific unit operations performed. Additionally or alternatively, endpoints and / or outputs of different processes can also be displayed (e.g., via endpoint graphs).For example, as shown in the image depicted in the pictorial diagram, a series of nodes labeled "Out.1" and "Out.2" represent different endpoints and / or outputs of a process, such as different ways of processing or storing a final product. For example, in the exemplary subgraph shown in the image depicted in the pictorial diagram, lines refer to experimental conditions or interrelated subsets of a process, such as preparing materials (e.g., media) to feed a cell-containing process. Arm / condition sections help orient operators to the specific task being performed, and by identifying various arms in a descriptive manner, data collected in the lab are entered into corresponding nodes, and numbers / quantities, etc., are not mixed between conditions. Process graphs therefore facilitate the visualization and management of complex manufacturing processes. Among other things, they allow researchers to track the progress of experiments, compare different conditions or variations side by side, and ensure that data is systematically collected at designated points throughout the process. The ability to visualize the entire process in this way helps identify bottlenecks, ensure consistency, and facilitate data-driven decision-making.

The invention discloses a multi-field fusion execution method based on a heterogeneous data flow diagram, and belongs to the technical field of computer systems. According to the method, an application program is abstracted into an instruction-level data flow diagram, hierarchical abstraction and fusion are carried out on instruction-level, thread-level and program-block-level data flow nodes, and finally an efficient heterogeneous data flow diagram is formed; a heterogeneous data flow diagram abstract machine is defined, and distribution, storage, scheduling and execution processes of the heterogeneous data flow diagram on a hardware level are described in detail, so that efficient execution of the model is realized; by designing a specific mapping rule, the heterogeneous data flow diagram is accurately mapped to a heterogeneous data flow diagram abstract machine, and finally the heterogeneous data flow diagram is mapped to specific hardware. According to the method, the concurrency of natural data of the data flow diagram is utilized, and the problem of effective fusion of multiple fields is successfully solved.

The invention relates to the technical field of computer software and digital signal processing, and discloses an audio engine real-time processing method and system based on topological sorting, and the method comprises the following steps: packaging an audio processing logic into an independent Block unit; all the Blocks exchange data through the shared audio bus, and each Block reads and writes data on the audio bus according to the input bus identifier and the output bus identifier of the Block, so that decoupling of the functional unit is realized. The core of the invention lies in that the system dynamically generates a unique and correct execution sequence of all Blocks by carrying out topological sorting on the data flow diagram before processing. The calculation ensures that any Block is executed after its data source Block by reversely traversing the data flow diagram from the final output Block. According to the method, the time sequence correctness and the system stability of the data stream in any complex and dynamically variable audio processing link are effectively ensured, and meanwhile, the flexibility and the intuition of audio processing flow construction are greatly improved.

The invention relates to the technical field of resource allocation management, and particularly discloses a resource allocation method and system for an enterprise asset panoramic management platform, and the method comprises the steps: obtaining business process definition information and resource domain topological information representing the distribution characteristics and transmission characteristics of a resource pool; constructing a business process data flow diagram; generating a candidate resource allocation combination set conforming to the data sensitivity constraint; calculating the total end-to-end cost and total time consumption of the whole business process; based on a preset optimization target, selecting a resource allocation combination from the candidate resource allocation combination set according to the total cost and / or the total time consumption, and generating a resource allocation instruction according to the selected resource allocation combination; according to the method, the problem that end-to-end global optimization cannot be carried out due to the fact that tasks are processed in an isolated mode through an existing strategy and data dependence between the tasks and cross-resource pool transmission characteristics are neglected is solved, and the effects of reducing unnecessary overhead and time delay are achieved.

The invention discloses a low-cost anti-SEU (single event upset) high-reliability circuit design automation method. The method comprises the following steps that a circuit design program described by a high-level language is compiled into an intermediate data flow diagram through an algorithm-level comprehensive EDA tool; in nodes of the CDFG, detection and repair design combining space redundancy and time redundancy is adopted for logic nodes and data nodes; eCC (error correction code), DMR (dual modular redundancy) or TMR (triple modular redundancy) detection logic is dynamically allocated according to node types, and RTL-level circuit design codes with self-detection and self-repair functions are generated. The method has the beneficial effects that the algorithm-level reinforcement EDA technology in the technical scheme can reduce the area cost of the TMR reinforcement technology by 2.3 times, and meanwhile, higher anti-SEU reliability is achieved.

The system efficiently distributes data in a cloud pipeline to geographically distributed users. To enable efficient distribution of resources to multiple users, the production pipeline can be represented as two flow graphs: a flow graph of tasks as well as a flow graph of data. The flow graph of tasks can indicate a sequence of tasks, departments, and users in a production pipeline. The flow graph of data can indicate location of data needed for each task in the flow graph of tasks, and location of the users assigned to the particular task. Based on the next task that needs to be executed in the flow graph of tasks, the system can proactively gather the data from the various locations and deliver the data to the users assigned to executing the next task.

The invention discloses a mold project progress lag risk early warning method, which is applied to the technical field of risk early warning, and comprises the following steps: defining a key monitoring node of an automobile mold, and constructing a risk judgment rule base containing a threshold value, a key index and a task dependency relationship; the plan data and the multi-source actual feedback data are integrated, the plan data and the actual execution data are compared in real time through an intelligent linkage engine, a progress deviation value is calculated, and an early warning node is recognized according to a threshold value in a risk judgment rule base; based on the dependency relationship in the risk decision rule base, the identified early warning node is evaluated, the influence path of the early warning node is simulated, and a visual data flow diagram is generated; and triggering a grading early warning notification according to the risk grade in the evaluation result. According to the method, various risk factors are fused into the comprehensive risk index through the dynamic aggregation algorithm, so that the accuracy and reliability of risk early warning are effectively improved.

The invention discloses an intelligent application recommendation and aggregation method and device based on scene perception, and relates to the technical field of mobile computing and human-computer interaction. The method comprises the steps of inputting multi-dimensional data of a current user scene into a pre-trained intention recognition model, and outputting a current task type of a user and an associated application function demand; screening application components meeting all application function requirements; constructing a cross-application API bus, and generating a data flow diagram; generating a dynamic aggregation interface through an adaptive layout engine; in the interaction process, data field change is monitored in real time, and preloading and data updating of downstream application components are triggered through an API bus; if the user leaves the current task scene, unused application components are automatically unloaded. By adopting the technical scheme provided by the invention, the task completion steps can be reduced by more than half; the cross-application data synchronization delay is maintained at a hundred millisecond level; and a multi-mode input triggering aggregation service is supported.

The invention discloses a sea clutter task-level simulation optimization method, a medium and a program product, the sea clutter task-level simulation optimization method comprises the following steps: a pre-constructed data flow diagram of sea clutter calculation tasks is acquired, nodes of the data flow diagram represent the calculation tasks, and data dependence relations among the calculation tasks are directionally represented; hierarchical processing is conducted on the data flow diagram, all the calculation tasks are divided into different hierarchies, and no data dependence relation exists between the calculation tasks of the same hierarchies; and performing task calculation layer by layer based on a CUDA parallel calculation framework according to a hierarchical sequence. According to the method, the calculation tasks are divided into different levels, the calculation tasks of the same level have no data dependency relationship, and parallel execution of task levels is realized by combining a CUDA multi-stream processing technology, so that the sea clutter simulation efficiency is effectively improved, and theoretical and technical support is provided for rapid simulation of the sea clutter.

The invention relates to the technical field of computers, and discloses a task processing method and device, electronic equipment, a storage medium and a program product.The method comprises the steps that a first data flow diagram of a target flow processing task is obtained, and the first data flow diagram comprises at least one first operator; feature extraction is carried out on the first operator to obtain a first feature vector, and the first feature vector is irrelevant to the degree of parallelism of the first operator; predicting a bottleneck state of the first operator under the at least one selectable parallelism degree based on the first feature vector and the at least one selectable parallelism degree to obtain a bottleneck prediction result of the first operator under the at least one selectable parallelism degree; configuring the degree of parallelism of a first operator in the first data flow diagram based on the bottleneck prediction result to obtain a configuration result; and processing the target stream processing task based on the configuration result to obtain a processing result of the target stream processing task. According to the invention, the parallelism degree configuration problem of operators can be solved.

The invention belongs to the technical field of astronomical star-pointing explanation software, and discloses a master control method of an intelligent astronomical star-pointing explanation instrument, which comprises an intelligent voice interaction module, a celestial body positioning calibration module and a large model knowledge engine and interaction module. The invention also provides a modularized layered architecture which covers three core modules, namely a voice interaction module, a celestial body positioning module and a large-model knowledge engine module. Through a use case diagram and a data flow diagram, interaction logic between a user and a system and a flow mode of data between software and hardware are presented. Meanwhile, the software and hardware list and the deployment diagram further define resource and environment configuration required by system operation. The key technology design focuses on the problems of data interaction protocols, voice recognition optimization, user experience enhancement and the like, for example, the voice recognition error rate is reduced through fuzzy matching, the telescope operation precision is improved through rocker hierarchical control, and the learning requirements of different users are met through hierarchical knowledge display.