Semiconductor device and forming method thereof

Abstract

The invention relates to a semiconductor device and a forming method thereof. The forming method comprises the steps of: forming a first gate dielectric layer and a first gate electrode on the first gate dielectric layer in a first trench; forming a second gate dielectric layer and a second gate electrode on the second gate dielectric layer in a second trench; etching part of the first gate dielectric layer on the side wall of the first trench, and forming a first recess between the first gate electrode and a first dielectric layer; etching part of the second gate dielectric layer on the sidewall of the second trench, and forming a second recess between the second gate electrode and the first dielectric layer; forming a first protective layer and a second protective layer, wherein the first protective layer is positioned in the first recess, and the second protective layer is positioned in the second recess; and finishing and grinding the surface of the first dielectric layer and thetop surfaces of the first protective layer and the second protective layer by taking the first gate electrode and the second gate electrode as stop layers. Through adoption of the forming method of the invention, the performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] MOS transistors are one of the most important components in modern integrated circuits. The basic structure of a MOS transistor includes: a semiconductor substrate; a gate structure located on the surface of the semiconductor substrate, a source region located in the semiconductor substrate on one side of the gate structure, and a drain region located in the semiconductor substrate on the other side of the gate structure. The working principle of the MOS transistor is: by applying a voltage to the gate structure, the current through the channel at the bottom of the gate structure is adjusted to generate a switching signal. [0003] With the development of semiconductor technology, the ability of the traditional planar MOS transistor to control the channel current becomes weaker, resultin...

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Problems solved by technology

[0004] However, in the prior art, the performance of semiconductor devices composed of both planar MOS transistors and fin field effect transistors is poor.

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