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GPU chip-oriented host interface unit performance simulation method and platform

A technology of host interface and simulation method, which is applied in the direction of function inspection and detection of faulty computer hardware and instruments, etc. It can solve the problems that the RTL simulation platform is not easy to build, and achieve the effect of reducing iterations

Pending Publication Date: 2020-04-03
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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Problems solved by technology

[0007] Based on the problems existing in the background technology, a GPU performance simulation platform based on SystemC TLM virtual prototype provided by the present invention can quickly obtain RTL module level and system level simulation of GPU with the minimum development cost by means of the TLM virtual prototype platform of GPU The platform solves the problem that the GPU module-level and system-level RTL simulation platform is not easy to build, and can quickly perform RTL simulation on the GPU module level and system level

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  • GPU chip-oriented host interface unit performance simulation method and platform

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Embodiment Construction

[0048] Now, the present invention is described in detail in conjunction with the accompanying drawings.

[0049] Propose a kind of performance emulation method facing GPU chip host interface unit in a fact example of the present invention, method comprises the following steps:

[0050] 1) Using SystemC language and transaction-level modeling TLM method, build a performance simulation platform for the GPU chip host interface unit;

[0051] 2) The host interface unit port conversion in the performance simulation platform only converts the external transaction level port into a hardware signal level port. Embed the host interface RTL unit into the host interface unit port translation;

[0052] 3) The input and output timing of the host interface RTL unit is collected through host interface unit port conversion, and the performance efficiency of the host interface RTL unit is counted to achieve the purpose of performance simulation verification of the host interface unit.

[005...

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Abstract

The invention belongs to the technical field of computer hardware verification, relates to a GPU performance simulation method and platform based on a SystemC TLM virtual prototype,especially to a GPUchip-oriented host interface unit performance simulation method and platform. According to the method, the SystemC is adopted to perform TLM modeling on the performance of the GPU according to moduledivision, and TLM modules of any scale and any level in the GPU can be replaced with RTL codes, so that the RTL module simulation platform of the GPU can reuse a GPU virtual prototype platform.According to the method, the SystemC is adopted to perform TLM modeling on the performance of the GPU according to module division, and the whole TLM model of the GPU can be replaced with the RTL codes, sothat the RTL system simulation platform of the GPU reuses the GPU virtual prototype platform. According to the method and the platform, coordination of work among software personnel, hardware module RTL developers and simulation verification personnel is facilitated, and unnecessary iteration is reduced.

Description

technical field [0001] The invention belongs to the technical field of computer hardware verification, and relates to a GPU performance simulation method and platform based on a SystemC TLM virtual prototype; in particular, it relates to a GPU chip-oriented host interface unit performance simulation method and platform. Background technique [0002] With the continuous increase of graphics applications, the early solution of graphics rendering by CPU alone has been difficult to meet the graphics processing needs of performance and technology growth, and the graphics processing unit (Graphic Processing Unit, GPU) came into being. Since Nvidia released the first GPU product in 1999, the development of GPU technology has mainly gone through the fixed performance pipeline stage, the stage of separating the dyer architecture, and the stage of unified dyer architecture. Rendering gradually extends to the field of general computing. The high-speed, parallel features and flexible p...

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Application Information

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IPC IPC(8): G06F11/26
CPCG06F11/261
Inventor 吴晓成张骏姜丽云陈佳张少锋郑新建
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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