High-voltage megavolt-level combined low-inductance medium storage capacitor and electromagnetic pulse simulator

A megavolt-level, combined technology, applied in the field of capacitors, can solve problems such as insulation performance, capacitance value and inductance that are difficult to balance, and achieve the effects of reducing the probability of flashover along the surface, reducing adsorption, and increasing the distance along the surface

Active Publication Date: 2022-03-29
NORTHWEST INST OF NUCLEAR TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In order to solve the problem that the relationship between the insulation performance of the medium storage capacitor structure, the capacitance value and the inductance pointed out in the background technology is difficult to balance, the present invention proposes a high-voltage megavolt level combined low inductance medium storage capacitor

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  • High-voltage megavolt-level combined low-inductance medium storage capacitor and electromagnetic pulse simulator
  • High-voltage megavolt-level combined low-inductance medium storage capacitor and electromagnetic pulse simulator
  • High-voltage megavolt-level combined low-inductance medium storage capacitor and electromagnetic pulse simulator

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Embodiment Construction

[0039] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0040] This embodiment provides a specific structure of a high-voltage megavolt-level combined low-inductance storage capacitor, such as figure 2 Shown, comprise high-voltage pole connection plate 19, low-voltage pole connection ring 21 and storage capacitor arm 20 in M ​​bar;

[0041] The high-voltage pole connecting plate 19 and the low-voltage pole connecting ring 21 are arranged in parallel;

[0042] The storage capacitor arm 20 in the M bar is located between the high-voltage pole connecting plate 19 and the...

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Abstract

The invention discloses a high-voltage megavolt-level combined low-inductance medium-storage capacitor, which comprises a high-voltage electrode connection plate, a low-voltage electrode connection plate and M middle-storage capacitor arms; the high-voltage electrode connection plate and the low-voltage electrode connection plate are arranged in parallel; The middle storage capacitor arms are located between the high voltage electrode connecting plate and the low voltage electrode connecting plate, and the M middle storage capacitor arms are evenly distributed along the circumferential direction; the high voltage end of each middle storage capacitor arm is connected to the high voltage electrode connecting plate, and each The low-voltage ends of the storage capacitor arms in the strip are all connected with the low-voltage pole connecting plate; the storage capacitor arms include a low-voltage electrode shielding plate, a magnetic-pressure low-voltage electrode, an insulating support ring, a magnetic-pressure intermediate electrode, a magnetic-pressure high-voltage electrode, and a high-voltage electrode. The shielding plate and the insulating cylinder; the middle storage capacitor structure of the present invention effectively balances the relationship among the insulating performance, the capacitance value and the inductance, and improves the performance index of the capacitor.

Description

technical field [0001] The invention relates to a capacitor, in particular to a high-voltage megavolt combined low-inductance medium storage capacitor. Background technique [0002] An electromagnetic pulse simulator is a device that generates fast leading edge electromagnetic pulses. Its composition diagram is as follows figure 1 shown. Generally, a two-stage compression circuit is often used to realize it, that is, a two-stage pulse compression through a Marx circuit, a middle storage circuit and a peaking circuit. The Marx circuit generates pulses of hundreds of nanoseconds, the storage circuit generates pulses of tens of nanoseconds, and the peaking circuit generates pulses of several nanoseconds. [0003] The typical working process of the simulator is: the primary pulse generator 1 generates a high-voltage pulse with a slow leading edge, and quickly charges the middle storage capacitor 3 through the high-voltage pulse output terminal 2. After the middle storage capa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01G4/38H01G2/22H01G2/10H02M9/04
CPCH01G4/38H01G2/22H01G2/10H02M11/00
Inventor 王海洋吴伟何小平陈伟谢霖燊孙楚昱肖晶程乐
Owner NORTHWEST INST OF NUCLEAR TECH
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