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PCIe bandwidth allocation method and basic input/output system

A basic input and output, bandwidth allocation technology, applied in the computer field, can solve problems such as waste of hardware resources and costs, extended boot time, etc., to achieve the effect of convenient allocation, reduction of hardware resource consumption and boot time

Pending Publication Date: 2022-02-15
NEW H3C BIG DATA TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, in the existing PCIe bandwidth allocation method, on the one hand, it is necessary to design a resistance circuit on the PCIe riser card, resulting in waste of hardware resources and costs; lead to extended boot time

Method used

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  • PCIe bandwidth allocation method and basic input/output system
  • PCIe bandwidth allocation method and basic input/output system
  • PCIe bandwidth allocation method and basic input/output system

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Embodiment Construction

[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is some embodiments of the present invention, but not all of them. Based on the implementation manners in the present invention, all other implementation manners obtained by those skilled in the art without creative efforts fall within the protection scope of the present invention.

[0033] The PCIe bandwidth allocation method provided by this application can be applied to the BIOS of the server, and the PCIe bandwidth allocation can be realized in the process of BIOS power-on self-test.

[0034] One or more PCIe modules are usually integrated in the CPU. Taking the Ice Lake CPU as an example, 4 PCIe modules can ...

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Abstract

The invention discloses a PCIe bandwidth allocation method and a basic input and output system, and the method comprises the steps: dividing a PCIe root port into a first number of sub-ports according to the minimum bandwidth unit when the basic input and output system is powered on for self-test; identifying whether each sub-port in the first number of sub-ports is connected with an external device, and generating an in-place identifier of each sub-port according to an identification result; reading a bandwidth configuration table, wherein the bandwidth configuration table is used for representing a matching relationship between the in-place identifier and a bandwidth allocation strategy; querying a target bandwidth allocation strategy matched with the first number of in-place identifiers from the bandwidth configuration table; and according to the target bandwidth allocation strategy, dividing the PCIe root port into a second number of sub-ports, and allocating a port bandwidth to each sub-port in the second number of sub-ports. According to the technical scheme provided by the invention, PCIe bandwidth resources can be efficiently and conveniently allocated.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a PCIe bandwidth allocation method and a basic input and output system. Background technique [0002] At present, in order to improve the performance of the server, high-performance PCIe (Peripheral Component Interconnect express, high-speed peripheral component interconnection standard) devices are usually installed in the server. adapter etc. [0003] Generally speaking, multiple PCIe modules are integrated inside the CPU, and each PCIe module can provide a certain number of physical channels. For example, a PCIe module can provide 16 physical lanes. Each physical channel has a corresponding bandwidth, which can represent the data throughput that the physical channel can carry. [0004] The physical channel provided by the PCIe module can be transferred through the PCIe riser card. One or more slots can be set on the PCIe riser card, and these slots can jointly divide the...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F11/22G06F13/20
CPCG06F9/5027G06F11/2284G06F13/20G06F2213/0026
Inventor 李雪
Owner NEW H3C BIG DATA TECH CO LTD
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