Method and device for high-speed buffering of buffer

A high-speed cache and high-speed cache storage technology, which is applied in the direction of instruments, memory systems, electrical digital data processing, etc., can solve problems such as inability to obtain high-speed access

Inactive Publication Date: 2005-06-29
NEC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this case, high-speed access cannot be obtained

Method used

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  • Method and device for high-speed buffering of buffer
  • Method and device for high-speed buffering of buffer
  • Method and device for high-speed buffering of buffer

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Embodiment Construction

[0045] Hereinafter, the switching device of the cache memory device to which the present invention is applied will be described in detail with reference to the accompanying drawings.

[0046] image 3 The basic structure of the switching device used in the present invention is shown. refer to image 3 , the switching system includes a communication routing section 12 , a processor (CPU) 16 , a cache storage section 23 , and a magnetic disk section 18 as a main storage section and a magnetic tape section 20 as an auxiliary storage section 20 . Communication routing section 12 controls telephone lines between telephone subscribers 10, such as image 3 mentioned. A processor (CPU) controls the communication routing section 12 . That is, the processor 16 reads the program from the magnetic disk section 18 or the auxiliary storage section 20 as the main storage section and interprets and executes each program command. Therefore, necessary commands and data are sent to the comm...

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Abstract

A cache memory device includes a storage section, a cache memory, and a control section. The cache memory stores the balanced tree and the free list. The data contained in the buffer is provided hierarchically as nodes in the balanced tree, and free tables having different sizes are provided respectively. When there is at least one free list, each free list contains at least one free buffer. When the requested data does not exist in the balanced tree tree, the control section searches the free list for the required buffer according to the size of the requested data. The size of the required buffer is larger than the size of the requested data and as small as possible.

Description

technical field [0001] The present invention relates to a file system, more specifically to a buffer cache control method and a device thereof. Background technique [0002] A communication channel section 12 is usually provided in a switching system for controlling telephone lines between telephone subscribers 10, such as figure 1 shown in . The communication routing section 12 is controlled by a central processing section 14 such as a computer. That is, the central control section 16 reads programs from the main storage section 18 and the auxiliary storage section 20 and interprets and executes commands of each program. Therefore, by sending necessary commands and data to the communication routing section 12, all functions such as billing functions and call processing functions can be controlled. [0003] Also, a maintenance and operation section (console) 22 exchanges data with the central processing section 16 . [0004] In this switching system, various types of fil...

Claims

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Application Information

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IPC IPC(8): G06F3/06G06F12/00G06F12/02G06F12/08
CPCG06F3/0613G06F3/0643G06F3/0656G06F3/0676G06F12/023G06F12/0866
Inventor山中亘
OwnerNEC CORP