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Sigma-delta ADC with dither

a technology of dither and delta modulator, applied in the field of circuits, systems and methods for differential conversion of analog, can solve the problems of conversion errors, delta modulator can introduce spurious noise tones into output, etc., and achieve the effect of reducing spurious noise tones and reducing noise tones

Active Publication Date: 2016-07-14
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This patent describes a way to reduce noise in sigma-delta analog-to-digital converters. The inventors have discovered that by introducing a filtered dither signal into two signal paths, they can disrupt periodic limit-cycle oscillations in sigma-delta modulators and reduce the spurious noise tones from the converter. By subtracting the signals from the two paths, the filtered dither signal is effectively removed from the digital output signal. This results in a cleaner and more accurate signal.

Problems solved by technology

A potential problem with a sigma-delta ADC is that its sigma-delta modulator can introduce spurious noise tones into their output due to nonlinear limit-cycle oscillations inside the modulator loop.
These noise tones can lead to conversion errors.

Method used

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Embodiment Construction

[0021]The inventors have recognized and appreciated that the performance of multi-bit sigma-delta ADCs can be improved by reducing spurious noise tones introduced by the sigma-delta modulator. The inventors have recognized and appreciated that the noise tones can be reduced by adding a filtered dither signal to two inputs of a pseudo-differential sigma-delta ADC, such that the dither output can be essentially cancelled from the ADC output signal without requiring special filtering or additional circuitry to remove the dither signal at the ADC output. FIG. 1 depicts just one example of a sigma-delta ADC 100 in which a dither signal can be used to reduce spurious noise tones of the sigma-delta modulators.

[0022]Before describing the circuit of FIG. 1, it is helpful to describe three different types of circuit configurations: single-ended, fully-differential, and pseudo-differential. A single-ended circuit operates on an input signal, which may be time varying, that is referenced to ano...

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Abstract

Systems and methods for reducing spurious noise tones in sigma-delta analog-to-digital converters (ADCs) are described. A dither signal may be added to two differential input signals of a pseudo-differential sigma-delta ADC. The dither signal may be generated by a pseudo-random bit sequence generator and applied to two input buffers, which add the dither signal to received differential analog input signals. The dithered signals may be digitized by two independent sigma-delta ADCs and then subtracted to remove the dither signal from an overall digital output signal.

Description

RELATED APPLICATIONS[0001]This application claims the benefit of U.S. provisional Application Ser. No. 62 / 103,182, titled “Sigma-Delta ADC with Dither,” filed on Jan. 14, 2015 and to U.S. provisional Application Ser. No. 62 / 162,245 of the same title, filed on May 15, 2015. The entire disclosure of the foregoing applications are incorporated herein by reference.BACKGROUND[0002]1. Technical Field[0003]The technology relates to circuits, systems, and methods for differential conversion of analog to digital signals.[0004]2. Discussion of the Related Art[0005]Analog-to-digital converters (ADCs) are widely used in various electronic apparatus and systems such as mobile phones, audio equipment, image-capture devices, video equipment, wireline communications systems, sensors and measurement equipment, and radar systems, among other applications. A typical ADC is an electronic circuit configured to receive an analog signal, which typically is a time-varying signal, repeatedly sample the anal...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H03M3/00
CPCH03M3/458H03M3/328H03M1/12H03F3/505H03F2203/5021H03F2203/5031H03F2203/5033H03M3/332H03F2200/331H03M1/00H03M1/0641
Inventor OP 'T EYNDE, FRANKLO, CHI-LUNASHBURN, MICHAEL A.
Owner MEDIATEK INC