2results about How to "Eliminate occupancy" patented technology

The application relates to a sickbed and a medical scanning device, the sickbed comprising: a bed frame; a bed plate, which is movably connected with the bed frame; a push chain mechanism, which comprises a driving device and a push chain, the driving device being connected with the push chain, an output end of the push chain being connected with the bed plate, and a pipeline channel being arranged in the push chain; and a functional pipeline, which is arranged in the pipeline channel. When the push chain with the chain dragging function and the bed plate jointly enter a containing cavity, the chain dragging function eliminates the occupation of the scanning space by the chain, thereby releasing more scanning space for a scanning object.

The invention relates to the technical field of data acquisition and processing, and discloses a multi-level time sequence optimization logic method for FPGA high-frequency data acquisition and processing, which can significantly break through the performance bottleneck of a traditional static hardware architecture in processing non-stationary high-frequency signals, and can improve the performance of the FPGA high-frequency data acquisition and processing by introducing a dynamic value evaluation system based on signal entropy. According to the method, accurate capture and priority scheduling of key mutation data are achieved, occupation of invalid data on computing resources is thoroughly eliminated, and by means of time sequence and resource coupled topology planning and an elastic assembly line reconstruction technology, hardware logic has the self-adaptive capacity of real-time deformation along with data features, and the real-time performance of the hardware logic is improved. Not only are time sequence conflicts and metastable state risks effectively avoided under extreme working conditions, but also self-evolution and calibration of system parameters are realized through a closed-loop feedback mechanism. And the utilization efficiency of logic resources and the robustness of multi-task parallel processing are remarkably improved.