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Programmable digital signal processor having a clustered SIMD microarchitecture including a complex short multiplier and an independent vector load unit

A digital signal and processor technology, applied in the field of programmable digital signal processor micro-architecture, can solve the problems of increasing die area and limiting performance

Inactive Publication Date: 2008-08-06
扩你科公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

These conventional PBBP solutions may have disadvantages such as increased die area and possibly limited performance when compared to their ASIC counterparts

Method used

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  • Programmable digital signal processor having a clustered SIMD microarchitecture including a complex short multiplier and an independent vector load unit
  • Programmable digital signal processor having a clustered SIMD microarchitecture including a complex short multiplier and an independent vector load unit
  • Programmable digital signal processor having a clustered SIMD microarchitecture including a complex short multiplier and an independent vector load unit

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Embodiment Construction

[0020] Turning now to FIG. 1 , a block diagram of one embodiment of a multimode wireless communication device including a programmable baseband processor is shown. In the illustrated embodiment some basic parts of a radio communication system are shown from a functional and hardware point of view. More specifically, the multimode wireless communication device 100 includes a receive subsystem 110 and a transmit subsystem 120 that are both coupled to one or more antennas 125 . Note that in various embodiments, the multi-mode wireless communication device may be a handheld mobile phone device or the like. Note also that elements having reference designators comprising numbers and letters may suitably be indicated by numbers only.

[0021] Receive subsystem 110 includes a portion of RF front end 130 coupled between antenna 125 and analog-to-digital converter (ADC) 140 . ADC 140 is coupled to programmable baseband processor (PBBP) 145A, which in turn is coupled to application pro...

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Abstract

A programmable digital signal processor with a clustered SIMD microarchitecture includes a plurality of accelerator units, a processor core, and a complex computing unit. Each of the accelerator units may perform one or more dedicated functions. The processor core includes an integer execution unit that may execute integer instructions. The complex computing unit may include a complex arithmetic logic unit execution pipeline that may include one or more datapaths configured to execute complex vector instructions, and a vector load unit. In addition, each datapath may include a complex short multiplier accumulator unit that may be configured to multiply a complex data value by values in the set of numbers including {0, + / -1}+ {0, + / -i}. The vector load unit may cause the complex data items to be fetched each clock cycle for use by any datapath in the complex arithmetic logic unit execution pipeline.

Description

technical field [0001] This invention relates to digital signal processors, and more particularly, to programmable digital signal processor microarchitectures. Background technique [0002] In a very short period of time, the use of wireless devices, especially mobile phones, has increased dramatically. This worldwide growth of wireless devices has resulted in the convergence of a large number of emerging radio standards and wireless products. This, in turn, has also led to increasing interest in software-defined radio (SDR, Software DefinedRadio). [0003] As stated by the SDR Forum, SDR is a collection of hardware and software technologies that enable reconfigurable system architectures for wireless networks and user terminals. SDRs provide an efficient and relatively inexpensive solution to the problem of building multimode, multiband, multifunction wireless devices that can be enhanced with software upgrades. Thus, SDR can be considered as an enabling technology appli...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/78
CPCG06F9/3885G06F7/4812G06F7/5443G06F7/57G06F9/3001G06F9/325G06F9/342G06F9/3822G06F9/3853G06F9/3891G06F15/8092G06F8/00G06F15/78G06F15/80
Inventor 达克·刘安德斯·尼尔松埃里克·特尔
Owner 扩你科公司
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