Semiconductor device

A semiconductor and internal wire technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., can solve the problems of hindering the flow of resin, difficult to inject resin, etc.
CN101399258BInactive Publication Date: 2012-05-30RENESAS ELECTRONICS CORP
2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Patents(China)
Current Assignee / Owner
RENESAS ELECTRONICS CORP
Publication Date
2012-05-30
Estimated Expiration
Not applicable Β· inactive patent

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

This invention refers to a semiconductor device capable of easily performing chip contraposition when a lower die pad carries two chips in transversely arranged. A plurality of inner leads (15) is arranged around the first and second die pads which are arranged side by side. First and second chips (16, 17) are mounted on the first and second die pads (11, 12). A bar (18) is provided between the first and second chips (16, 17) and the plurality of inner leads (15), extending in an array direction of the first chip (16) and the second chip (17). A plurality of wires connects the first and second chips (16, 17) and the plurality of inner leads (15) and connects the first chip (16) and the second chip (17); and a resin (21) seals the first and second die pads, the plurality of inner leads, the first and second chips, the plurality of wires and the bar, wherein the bar (18) comprises a bump (19) as a mark provided at a position corresponding to an area between the first chip (16) and the second chip (17) in an array direction of the first chip and the second chip.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The present invention relates to a so-called SIP (System In Package) type semiconductor device in which two chips are mounted side by side on a sub-substrate and sealed with a resin. Background technique

[0002] Figure 9 It is a plan view showing a conventional semiconductor device in which two chips are mounted laterally on a large submount. Two chips 16 and 17 are mounted on the lower backing plate 31 . Here, the lower backing plate 31 is larger than the chips 16 , 17 . Chips 16 , 17 are connected to a plurality of internal wires 15 by a plurality of leads 20 , and chips 16 , 17 are connected to each other. Between the chips 16 , 17 , a slit 32 is formed on the lower backing plate 31 . In the manufacturing process of the semiconductor device, when the chips 16 and 17 are mounted on the sub-substrate 31 , the ends of the sub-substrate 31 and the slits 32 are marked and aligned. Also, Patent Document 2 describes a semiconductor device in which on...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More