Generator for check bit of quasi-cyclic shift low-density check code base on bi-diagonal

Abstract

The invention discloses a check bit generator based on bidiagonal quasi-cyclic shift check code with low density, and relates to coding devices; the check bit generator mainly solves the problem of high complexity and long coding time in the existing encoder. The check bit generator comprises a precoding memory location and a check bit generation unit, wherein, the precoding memory location is used for storing precoded data, and includes a front-end modular two adder sigma' and a plurality of parallel two-state shift registers; each of the two-state shift registers is formed by sequentially connecting an either-or selector and a plurality of D triggers; the check bit generation unit is used for generating check bit which is composed of m-1 back-end modular two adders sigma. The data output by the precoding memory location is transmitted to the check bit generation unit, and the check bit is output by the check bit generation unit. The check bit generator has the advantages of simple structure and high coding efficiency, and can be used as the device of an LDPC encoder.

Description

technical field [0001] The invention belongs to the communication field and relates to coding technology, in particular to a component of an LDPC code encoder capable of fast coding. Background technique [0002] In modern digital communication systems, in order to ensure that various data can be transmitted reliably and effectively, error correction coding technology is often used. In recent years, with the development of wireless digital communication and the emergence of various high-speed data services, it is more and more important to study and use error correction coding technology. [0003] Theoretical studies show that the performance of LDPC long codes exceeds Turbo codes and is close to the Shannon limit. It also has linear decoding complexity and is suitable for high-speed data transmission. In the development process of LDPC code from theoretical research to practical application, the coding complexity of LDPC code and the coding delay caused by it have become a...

AI Technical Summary

Problems solved by technology

[0007] The purpose of the present invention is to provide a check digit generator based on a double-diagonal quasi-cyclic shift low-density check code, to solve the problems of high complexity of the encoder and large encoding delay, and to achieve fast encoding

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