Method for realizing low spurious small-step frequency synthesizer

Abstract

The invention discloses a method for realizing a low spurious small-step frequency synthesizer. The method comprises the following steps of: inputting the output of a constant-temperature crystal oscillator serving as an initial reference signal into a phase-locked loop system, and selecting a low-pass filter meeting a low-phase-noise condition for serving as a low-pass filter in the phase-lockedloop system; and adjusting the drain current of a phase-locked loop chip in the phase-locked loop system to keep constant time delay after a reference signal output by a reference frequency divider and a feedback signal output by a feedback frequency divider reach a phase discriminator, wherein the output under a set feedback frequency division coefficient of the feedback frequency divider is taken as the output of the phase-locked loop system. As proved by an experiment, 2MHz stepping can be continuously realized in the frequency range 1,800M-3,100MHz, the out-off-band fractional-N scattering is over -70dBc, and the near-end scattering of the entire phase-locked loop system is over -70dBc.

Description

technical field [0001] The invention relates to the technical field of frequency synthesis, in particular to a method for realizing frequency synthesis with low stray small steps. Background technique [0002] With the increasing shortage of radio resources and the rapid development of radio technology, the requirements for the test accuracy of radio signals are becoming more and more stringent, so the requirements for the frequency resolution and near-end spurious indicators of the local oscillator in the test system are becoming more and more stringent. higher. The main body of the local oscillator is the phase-locked loop system, and the frequency resolution and near-end spurs of the phase-locked loop system basically determine the frequency resolution and near-end spurs of the local oscillator. [0003] Such as figure 1 As shown, the phase-locked loop system generally includes a high-stability, low-phase-noise reference module, a low-pass filter, a phase-locked loop ch...

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Problems solved by technology

[0005] The current phase-locked loop system generally uses the reference signal frequency input by DDS (Direct Digital Synthesizer) to realize the high resolution of the carrier output. Larger spurs within the channel bandwidth, so that the carrier output has larger near-end spurs; the suppression of fractional frequency division spurs is generally suppressed by reducing the loop bandwidth, but excessively reducing the loop bandwidth will deteriorate Near-end phase noise increases the locking time and makes the PLL system unstable

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